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https://github.com/RGBCube/serenity
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Kernel: Run clang-format on files
Let's rip off the band-aid
This commit is contained in:
Shannon Booth
Andreas Kling
parent
d0629d0a8c
commit
81adefef27
25 changed files with 2992 additions and 2995 deletions
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@ -108,103 +108,103 @@ void PCI::Access::disable_bus_mastering(Address address)
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namespace PCI {
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void enumerate_all(Function<void(Address, ID)> callback)
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{
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PCI::Access::the().enumerate_all(callback);
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}
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void enumerate_all(Function<void(Address, ID)> callback)
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{
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PCI::Access::the().enumerate_all(callback);
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}
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void raw_access(Address address, u32 field, size_t access_size, u32 value)
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{
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ASSERT(access_size != 0);
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if (access_size == 1) {
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PCI::Access::the().write8_field(address, field, value);
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return;
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}
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if (access_size == 2) {
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PCI::Access::the().write16_field(address, field, value);
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return;
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}
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if (access_size == 4) {
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PCI::Access::the().write32_field(address, field, value);
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return;
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}
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ASSERT_NOT_REACHED();
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void raw_access(Address address, u32 field, size_t access_size, u32 value)
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{
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ASSERT(access_size != 0);
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if (access_size == 1) {
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PCI::Access::the().write8_field(address, field, value);
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return;
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}
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if (access_size == 2) {
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PCI::Access::the().write16_field(address, field, value);
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return;
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}
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if (access_size == 4) {
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PCI::Access::the().write32_field(address, field, value);
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return;
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}
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ASSERT_NOT_REACHED();
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}
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ID get_id(Address address)
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{
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return PCI::Access::the().get_id(address);
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}
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ID get_id(Address address)
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{
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return PCI::Access::the().get_id(address);
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}
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void enable_interrupt_line(Address address)
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{
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PCI::Access::the().enable_interrupt_line(address);
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}
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void disable_interrupt_line(Address address)
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{
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PCI::Access::the().disable_interrupt_line(address);
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}
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void enable_interrupt_line(Address address)
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{
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PCI::Access::the().enable_interrupt_line(address);
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}
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void disable_interrupt_line(Address address)
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{
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PCI::Access::the().disable_interrupt_line(address);
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}
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u8 get_interrupt_line(Address address)
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{
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return PCI::Access::the().get_interrupt_line(address);
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}
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u32 get_BAR0(Address address)
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{
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return PCI::Access::the().get_BAR0(address);
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}
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u32 get_BAR1(Address address)
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{
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return PCI::Access::the().get_BAR1(address);
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}
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u32 get_BAR2(Address address)
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{
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return PCI::Access::the().get_BAR2(address);
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}
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u32 get_BAR3(Address address)
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{
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return PCI::Access::the().get_BAR3(address);
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}
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u32 get_BAR4(Address address)
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{
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return PCI::Access::the().get_BAR4(address);
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}
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u32 get_BAR5(Address address)
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{
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return PCI::Access::the().get_BAR5(address);
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}
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u8 get_revision_id(Address address)
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{
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return PCI::Access::the().get_revision_id(address);
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}
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u8 get_subclass(Address address)
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{
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return PCI::Access::the().get_subclass(address);
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}
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u8 get_class(Address address)
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{
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return PCI::Access::the().get_class(address);
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}
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u16 get_subsystem_id(Address address)
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{
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return PCI::Access::the().get_subsystem_id(address);
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}
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u16 get_subsystem_vendor_id(Address address)
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{
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return PCI::Access::the().get_subsystem_vendor_id(address);
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}
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void enable_bus_mastering(Address address)
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{
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PCI::Access::the().enable_bus_mastering(address);
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}
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void disable_bus_mastering(Address address)
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{
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PCI::Access::the().disable_bus_mastering(address);
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}
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size_t get_BAR_Space_Size(Address address, u8 bar_number)
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{
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return PCI::Access::the().get_BAR_Space_Size(address, bar_number);
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}
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u8 get_interrupt_line(Address address)
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{
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return PCI::Access::the().get_interrupt_line(address);
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}
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u32 get_BAR0(Address address)
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{
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return PCI::Access::the().get_BAR0(address);
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}
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u32 get_BAR1(Address address)
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{
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return PCI::Access::the().get_BAR1(address);
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}
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u32 get_BAR2(Address address)
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{
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return PCI::Access::the().get_BAR2(address);
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}
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u32 get_BAR3(Address address)
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{
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return PCI::Access::the().get_BAR3(address);
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}
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u32 get_BAR4(Address address)
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{
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return PCI::Access::the().get_BAR4(address);
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}
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u32 get_BAR5(Address address)
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{
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return PCI::Access::the().get_BAR5(address);
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}
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u8 get_revision_id(Address address)
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{
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return PCI::Access::the().get_revision_id(address);
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}
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u8 get_subclass(Address address)
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{
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return PCI::Access::the().get_subclass(address);
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}
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u8 get_class(Address address)
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{
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return PCI::Access::the().get_class(address);
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}
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u16 get_subsystem_id(Address address)
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{
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return PCI::Access::the().get_subsystem_id(address);
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}
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u16 get_subsystem_vendor_id(Address address)
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{
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return PCI::Access::the().get_subsystem_vendor_id(address);
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}
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void enable_bus_mastering(Address address)
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{
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PCI::Access::the().enable_bus_mastering(address);
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}
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void disable_bus_mastering(Address address)
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{
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PCI::Access::the().disable_bus_mastering(address);
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}
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size_t get_BAR_Space_Size(Address address, u8 bar_number)
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{
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return PCI::Access::the().get_BAR_Space_Size(address, bar_number);
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}
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}
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}
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@ -68,134 +68,134 @@ namespace Kernel {
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//#define PCI_DEBUG 1
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namespace PCI {
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struct ID {
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u16 vendor_id { 0 };
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u16 device_id { 0 };
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struct ID {
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u16 vendor_id { 0 };
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u16 device_id { 0 };
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bool is_null() const { return !vendor_id && !device_id; }
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bool is_null() const { return !vendor_id && !device_id; }
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bool operator==(const ID& other) const
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{
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return vendor_id == other.vendor_id && device_id == other.device_id;
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}
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bool operator!=(const ID& other) const
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{
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return vendor_id != other.vendor_id || device_id != other.device_id;
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}
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};
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struct Address {
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public:
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Address() {}
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Address(u16 seg)
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: m_seg(seg)
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, m_bus(0)
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, m_slot(0)
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, m_function(0)
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{
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}
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Address(u16 seg, u8 bus, u8 slot, u8 function)
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: m_seg(seg)
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, m_bus(bus)
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, m_slot(slot)
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, m_function(function)
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{
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}
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Address(const Address& address)
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: m_seg(address.seg())
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, m_bus(address.bus())
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, m_slot(address.slot())
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, m_function(address.function())
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{
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}
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bool is_null() const { return !m_bus && !m_slot && !m_function; }
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operator bool() const { return !is_null(); }
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u16 seg() const { return m_seg; }
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u8 bus() const { return m_bus; }
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u8 slot() const { return m_slot; }
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u8 function() const { return m_function; }
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u32 io_address_for_field(u8 field) const
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{
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return 0x80000000u | (m_bus << 16u) | (m_slot << 11u) | (m_function << 8u) | (field & 0xfc);
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}
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protected:
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u32 m_seg { 0 };
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u8 m_bus { 0 };
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u8 m_slot { 0 };
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u8 m_function { 0 };
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};
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inline const LogStream& operator<<(const LogStream& stream, const Address value)
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bool operator==(const ID& other) const
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{
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return vendor_id == other.vendor_id && device_id == other.device_id;
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}
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bool operator!=(const ID& other) const
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{
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return vendor_id != other.vendor_id || device_id != other.device_id;
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}
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};
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struct Address {
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public:
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Address() {}
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Address(u16 seg)
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: m_seg(seg)
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, m_bus(0)
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, m_slot(0)
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, m_function(0)
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{
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}
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Address(u16 seg, u8 bus, u8 slot, u8 function)
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: m_seg(seg)
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, m_bus(bus)
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, m_slot(slot)
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, m_function(function)
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{
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return stream << "PCI [" << String::format("%w", value.seg()) << ":" << String::format("%b", value.bus()) << ":" << String::format("%b", value.slot()) << "." << String::format("%b", value.function()) << "]";
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}
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struct ChangeableAddress : public Address {
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ChangeableAddress()
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: Address(0)
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{
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}
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explicit ChangeableAddress(u16 seg)
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: Address(seg)
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{
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}
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ChangeableAddress(u16 seg, u8 bus, u8 slot, u8 function)
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: Address(seg, bus, slot, function)
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{
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}
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void set_seg(u16 seg) { m_seg = seg; }
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void set_bus(u8 bus) { m_bus = bus; }
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void set_slot(u8 slot) { m_slot = slot; }
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void set_function(u8 function) { m_function = function; }
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bool operator==(const Address& address)
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{
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if (m_seg == address.seg() && m_bus == address.bus() && m_slot == address.slot() && m_function == address.function())
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return true;
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else
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return false;
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}
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const ChangeableAddress& operator=(const Address& address)
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{
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set_seg(address.seg());
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set_bus(address.bus());
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set_slot(address.slot());
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set_function(address.function());
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return *this;
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}
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};
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Address(const Address& address)
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: m_seg(address.seg())
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, m_bus(address.bus())
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, m_slot(address.slot())
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, m_function(address.function())
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{
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}
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ID get_id(PCI::Address);
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void enumerate_all(Function<void(Address, ID)> callback);
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void enable_interrupt_line(Address);
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void disable_interrupt_line(Address);
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u8 get_interrupt_line(Address);
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void raw_access(Address, u32, size_t, u32);
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u32 get_BAR0(Address);
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u32 get_BAR1(Address);
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u32 get_BAR2(Address);
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u32 get_BAR3(Address);
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u32 get_BAR4(Address);
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u32 get_BAR5(Address);
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u8 get_revision_id(Address);
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u8 get_subclass(Address);
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u8 get_class(Address);
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u16 get_subsystem_id(Address);
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u16 get_subsystem_vendor_id(Address);
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size_t get_BAR_Space_Size(Address, u8);
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void enable_bus_mastering(Address);
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void disable_bus_mastering(Address);
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bool is_null() const { return !m_bus && !m_slot && !m_function; }
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operator bool() const { return !is_null(); }
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class Initializer;
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class Access;
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class MMIOAccess;
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class IOAccess;
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class MMIOSegment;
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class Device;
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u16 seg() const { return m_seg; }
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u8 bus() const { return m_bus; }
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u8 slot() const { return m_slot; }
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u8 function() const { return m_function; }
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u32 io_address_for_field(u8 field) const
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{
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return 0x80000000u | (m_bus << 16u) | (m_slot << 11u) | (m_function << 8u) | (field & 0xfc);
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}
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protected:
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u32 m_seg { 0 };
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u8 m_bus { 0 };
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u8 m_slot { 0 };
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u8 m_function { 0 };
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};
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inline const LogStream& operator<<(const LogStream& stream, const Address value)
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{
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return stream << "PCI [" << String::format("%w", value.seg()) << ":" << String::format("%b", value.bus()) << ":" << String::format("%b", value.slot()) << "." << String::format("%b", value.function()) << "]";
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}
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struct ChangeableAddress : public Address {
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ChangeableAddress()
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: Address(0)
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{
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}
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explicit ChangeableAddress(u16 seg)
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: Address(seg)
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{
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}
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ChangeableAddress(u16 seg, u8 bus, u8 slot, u8 function)
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: Address(seg, bus, slot, function)
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{
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}
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void set_seg(u16 seg) { m_seg = seg; }
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void set_bus(u8 bus) { m_bus = bus; }
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void set_slot(u8 slot) { m_slot = slot; }
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void set_function(u8 function) { m_function = function; }
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bool operator==(const Address& address)
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{
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if (m_seg == address.seg() && m_bus == address.bus() && m_slot == address.slot() && m_function == address.function())
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return true;
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else
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return false;
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}
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const ChangeableAddress& operator=(const Address& address)
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{
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set_seg(address.seg());
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set_bus(address.bus());
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set_slot(address.slot());
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set_function(address.function());
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return *this;
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}
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};
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ID get_id(PCI::Address);
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void enumerate_all(Function<void(Address, ID)> callback);
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void enable_interrupt_line(Address);
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void disable_interrupt_line(Address);
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u8 get_interrupt_line(Address);
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void raw_access(Address, u32, size_t, u32);
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u32 get_BAR0(Address);
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u32 get_BAR1(Address);
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u32 get_BAR2(Address);
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u32 get_BAR3(Address);
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u32 get_BAR4(Address);
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u32 get_BAR5(Address);
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u8 get_revision_id(Address);
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u8 get_subclass(Address);
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u8 get_class(Address);
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u16 get_subsystem_id(Address);
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u16 get_subsystem_vendor_id(Address);
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size_t get_BAR_Space_Size(Address, u8);
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void enable_bus_mastering(Address);
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void disable_bus_mastering(Address);
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class Initializer;
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class Access;
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class MMIOAccess;
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class IOAccess;
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class MMIOSegment;
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class Device;
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}
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