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LibX86: Disassemble most remaining FPU instructions

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Some of the remaining instructions have different behavior for
register and non-register ops.  Since we already have the
two-level flags tables, model this by setting all handlers in
the two-level table to the register op handler, while the
first-level flags table stores the action for the non-reg handler.
This commit is contained in:
Nico Weber 2020-07-28 17:05:57 -04:00 • committed by Andreas Kling
parent 06c59cce6f
commit 8593bdb711
5 changed files with 350 additions and 9 deletions
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67
DevTools/UserspaceEmulator/SoftCPU.cpp
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@ -1415,6 +1415,36 @@ void SoftCPU::FRNDINT(const X86::Instruction&) { TODO(); };
void SoftCPU::FSCALE(const X86::Instruction&) { TODO(); };
void SoftCPU::FSIN(const X86::Instruction&) { TODO(); };
void SoftCPU::FCOS(const X86::Instruction&) { TODO(); };
void SoftCPU::FIADD_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVB(const X86::Instruction&) { TODO(); };
void SoftCPU::FIMUL_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVE(const X86::Instruction&) { TODO(); };
void SoftCPU::FICOM_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVBE(const X86::Instruction&) { TODO(); };
void SoftCPU::FICOMP_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVU(const X86::Instruction&) { TODO(); };
void SoftCPU::FISUB_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FISUBR_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FUCOMPP(const X86::Instruction&) { TODO(); };
void SoftCPU::FIDIV_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FIDIVR_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FILD_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVNB(const X86::Instruction&) { TODO(); };
void SoftCPU::FISTTP_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVNE(const X86::Instruction&) { TODO(); };
void SoftCPU::FIST_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVNBE(const X86::Instruction&) { TODO(); };
void SoftCPU::FISTP_RM32(const X86::Instruction&) { TODO(); };
void SoftCPU::FCMOVNU(const X86::Instruction&) { TODO(); };
void SoftCPU::FNENI(const X86::Instruction&) { TODO(); };
void SoftCPU::FNDISI(const X86::Instruction&) { TODO(); };
void SoftCPU::FNCLEX(const X86::Instruction&) { TODO(); };
void SoftCPU::FNINIT(const X86::Instruction&) { TODO(); };
void SoftCPU::FNSETPM(const X86::Instruction&) { TODO(); };
void SoftCPU::FLD_RM80(const X86::Instruction&) { TODO(); };
void SoftCPU::FUCOMI(const X86::Instruction&) { TODO(); };
void SoftCPU::FCOMI(const X86::Instruction&) { TODO(); };
void SoftCPU::FSTP_RM80(const X86::Instruction&) { TODO(); };
void SoftCPU::FADD_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FMUL_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FCOM_RM64(const X86::Instruction&) { TODO(); }
@ -1423,6 +1453,43 @@ void SoftCPU::FSUB_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FSUBR_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FDIV_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FDIVR_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FLD_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FFREE(const X86::Instruction&) { TODO(); }
void SoftCPU::FISTTP_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FST_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FSTP_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FRSTOR(const X86::Instruction&) { TODO(); }
void SoftCPU::FUCOM(const X86::Instruction&) { TODO(); }
void SoftCPU::FUCOMP(const X86::Instruction&) { TODO(); }
void SoftCPU::FNSAVE(const X86::Instruction&) { TODO(); }
void SoftCPU::FNSTSW(const X86::Instruction&) { TODO(); }
void SoftCPU::FIADD_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FADDP(const X86::Instruction&) { TODO(); }
void SoftCPU::FIMUL_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FMULP(const X86::Instruction&) { TODO(); }
void SoftCPU::FICOM_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FICOMP_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FCOMPP(const X86::Instruction&) { TODO(); }
void SoftCPU::FISUB_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FSUBRP(const X86::Instruction&) { TODO(); }
void SoftCPU::FISUBR_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FSUBP(const X86::Instruction&) { TODO(); }
void SoftCPU::FIDIV_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FDIVRP(const X86::Instruction&) { TODO(); }
void SoftCPU::FIDIVR_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FDIVP(const X86::Instruction&) { TODO(); }
void SoftCPU::FILD_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FFREEP(const X86::Instruction&) { TODO(); }
void SoftCPU::FISTTP_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FIST_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FISTP_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::FBLD_M80(const X86::Instruction&) { TODO(); }
void SoftCPU::FNSTSW_AX(const X86::Instruction&) { TODO(); }
void SoftCPU::FILD_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FUCOMIP(const X86::Instruction&) { TODO(); }
void SoftCPU::FBSTP_M80(const X86::Instruction&) { TODO(); }
void SoftCPU::FCOMIP(const X86::Instruction&) { TODO(); }
void SoftCPU::FISTP_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::HLT(const X86::Instruction&) { TODO(); }
void SoftCPU::IDIV_RM16(const X86::Instruction& insn)