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LibX86: Disassemble most remaining FPU instructions
Some of the remaining instructions have different behavior for register and non-register ops. Since we already have the two-level flags tables, model this by setting all handlers in the two-level table to the register op handler, while the first-level flags table stores the action for the non-reg handler.
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5 changed files with 350 additions and 9 deletions
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@ -83,8 +83,12 @@ enum InstructionFormat {
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OP_RM32,
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OP_FPU,
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OP_FPU_reg,
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OP_FPU_mem,
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OP_FPU_AX16,
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OP_FPU_RM16,
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OP_FPU_RM32,
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OP_FPU_RM64,
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OP_FPU_M80,
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OP_RM8_reg8,
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OP_RM32_reg32,
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OP_reg32_RM32,
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@ -359,8 +363,12 @@ public:
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String to_string_o16(const Instruction&) const;
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String to_string_o32(const Instruction&) const;
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String to_string_fpu_reg() const;
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String to_string_fpu_mem(const Instruction&) const;
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String to_string_fpu_ax16() const;
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String to_string_fpu16(const Instruction&) const;
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String to_string_fpu32(const Instruction&) const;
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String to_string_fpu64(const Instruction&) const;
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String to_string_fpu80(const Instruction&) const;
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String to_string_mm(const Instruction&) const;
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bool is_register() const { return m_register_index != 0xffffffff; }
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