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https://github.com/RGBCube/serenity
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PCI: Add list of capabilities for each device during first enumeration
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parent
9d10eb473d
commit
85b4256d10
4 changed files with 44 additions and 3 deletions
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@ -129,6 +129,30 @@ void enumerate(Function<void(Address, ID)> callback)
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Access::the().enumerate(callback);
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}
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Optional<u8> get_capabilities_pointer(Address address)
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{
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if (PCI::read16(address, PCI_STATUS) & (1 << 4)) {
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return PCI::read8(address, PCI_CAPABILITIES_POINTER);
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}
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return {};
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}
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Vector<Capability> get_capabilities(Address address)
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{
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auto capabilities_pointer = PCI::get_capabilities_pointer(address);
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if (!capabilities_pointer.has_value())
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return {};
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Vector<Capability> capabilities;
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auto capability_pointer = capabilities_pointer.value();
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while (capability_pointer != 0) {
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u16 capability_header = PCI::read16(address, capability_pointer);
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u8 capability_id = capability_header & 0xff;
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capability_pointer = capability_header >> 8;
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capabilities.append({ capability_id, capability_pointer });
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}
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return capabilities;
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}
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void raw_access(Address address, u32 field, size_t access_size, u32 value)
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{
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ASSERT(access_size != 0);
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@ -30,6 +30,7 @@
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#include <AK/LogStream.h>
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#include <AK/String.h>
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#include <AK/Types.h>
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#include <AK/Vector.h>
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namespace Kernel {
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@ -180,20 +181,33 @@ struct ChangeableAddress : public Address {
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}
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};
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struct Capability {
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u8 m_id;
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u8 m_next_pointer;
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};
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class PhysicalID {
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public:
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PhysicalID(Address address, ID id)
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PhysicalID(Address address, ID id, Vector<Capability> capabilities)
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: m_address(address)
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, m_id(id)
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, m_capabilities(capabilities)
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{
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#ifdef PCI_DEBUG
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for (auto capability : capabilities) {
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dbg() << address << " has capbility " << capability.m_id;
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}
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#endif
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}
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Vector<Capability> capabilities() const { return m_capabilities; }
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const ID& id() const { return m_id; }
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const Address& address() const { return m_address; }
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private:
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Address m_address;
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ID m_id;
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Vector<Capability> m_capabilities;
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};
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ID get_id(PCI::Address);
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@ -215,8 +229,11 @@ u8 get_class(Address);
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u16 get_subsystem_id(Address);
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u16 get_subsystem_vendor_id(Address);
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size_t get_BAR_space_size(Address, u8);
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Optional<u8> get_capabilities_pointer(Address);
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Vector<Capability> get_capabilities(Address);
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void enable_bus_mastering(Address);
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void disable_bus_mastering(Address);
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PhysicalID get_physical_id(Address address);
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class Access;
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class MMIOAccess;
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@ -40,7 +40,7 @@ IOAccess::IOAccess()
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{
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klog() << "PCI: Using I/O instructions for PCI configuration space access";
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enumerate_hardware([&](const Address& address, ID id) {
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m_physical_ids.append({ address, id });
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m_physical_ids.append({ address, id, get_capabilities(address) });
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});
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}
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@ -122,7 +122,7 @@ MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg)
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InterruptDisabler disabler;
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enumerate_hardware([&](const Address& address, ID id) {
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m_physical_ids.append({ address, id });
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m_physical_ids.append({ address, id, get_capabilities(address) });
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m_mapped_device_regions.append(make<DeviceConfigurationSpaceMapping>(address, m_segments.get(address.seg()).value()));
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#ifdef PCI_DEBUG
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dbg() << "PCI: Mapping device @ pci (" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ")"
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