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Kernel/PCI: Introduce a new ECAM access mechanism
Now the kernel supports 2 ECAM access methods. MMIOAccess was renamed to WindowedMMIOAccess and is what we had until now - each device that is detected on boot is assigned to a memory-mapped window, so IO operations on multiple devices can occur simultaneously due to creating multiple virtual mappings, hence the name is a memory-mapped window. This commit adds a new class called MMIOAccess (not to be confused with the old MMIOAccess class). This class creates one memory-mapped window. On each IO operation on a configuration space of a device, it maps the requested PCI bus region to that window. Therefore it holds a SpinLock during the operation to ensure that no other PCI bus region was mapped during the call. A user can choose to either use PCI ECAM with memory-mapped window for each device, or for an entire bus. By default, the kernel prefers to map the entire PCI bus region.
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parent
441e374396
commit
8abbb7e090
11 changed files with 320 additions and 100 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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#include <AK/Types.h>
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#include <Kernel/ACPI/Definitions.h>
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#include <Kernel/PCI/Access.h>
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#include <Kernel/SpinLock.h>
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#include <Kernel/VM/AnonymousVMObject.h>
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#include <Kernel/VM/PhysicalRegion.h>
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#include <Kernel/VM/Region.h>
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namespace Kernel {
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namespace PCI {
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class DeviceConfigurationSpaceMapping {
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#define PCI_MMIO_CONFIG_SPACE_SIZE 4096
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class MMIOAccess : public Access {
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public:
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DeviceConfigurationSpaceMapping(Address, const MMIOSegment&);
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VirtualAddress vaddr() const { return m_mapped_region->vaddr(); };
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PhysicalAddress paddr() const { return m_mapped_region->physical_page(0)->paddr(); }
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const Address& address() const { return m_device_address; };
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class MMIOSegment {
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public:
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MMIOSegment(PhysicalAddress, u8, u8);
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u8 get_start_bus() const;
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u8 get_end_bus() const;
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size_t get_size() const;
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PhysicalAddress get_paddr() const;
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private:
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PhysicalAddress m_base_addr;
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u8 m_start_bus;
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u8 m_end_bus;
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};
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static void initialize(PhysicalAddress mcfg);
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private:
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Address m_device_address;
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NonnullOwnPtr<Region> m_mapped_region;
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};
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class MMIOAccess final : public Access {
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public:
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static void initialize(PhysicalAddress mcfg);
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PhysicalAddress determine_memory_mapped_bus_region(u32 segment, u8 bus) const;
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void map_bus_region(u32, u8);
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VirtualAddress get_device_configuration_space(Address address);
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SpinLock<u8> m_access_lock;
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u8 m_mapped_bus { 0 };
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OwnPtr<Region> m_mapped_region;
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protected:
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explicit MMIOAccess(PhysicalAddress mcfg);
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private:
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virtual const char* access_type() const override { return "MMIO-Access"; };
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virtual const char* access_type() const override { return "MMIOAccess"; };
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virtual u32 segment_count() const override;
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virtual void enumerate_hardware(Function<void(Address, ID)>) override;
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virtual void write8_field(Address address, u32, u8) override;
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@ -70,13 +81,11 @@ private:
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virtual u16 read16_field(Address address, u32) override;
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virtual u32 read32_field(Address address, u32) override;
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Optional<VirtualAddress> get_device_configuration_space(Address address);
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virtual u8 segment_start_bus(u32) const override;
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virtual u8 segment_end_bus(u32) const override;
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PhysicalAddress m_mcfg;
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HashMap<u16, MMIOSegment> m_segments;
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NonnullOwnPtrVector<DeviceConfigurationSpaceMapping> m_mapped_device_regions;
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};
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}
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