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Kernel/PCI: Introduce a new ECAM access mechanism
Now the kernel supports 2 ECAM access methods. MMIOAccess was renamed to WindowedMMIOAccess and is what we had until now - each device that is detected on boot is assigned to a memory-mapped window, so IO operations on multiple devices can occur simultaneously due to creating multiple virtual mappings, hence the name is a memory-mapped window. This commit adds a new class called MMIOAccess (not to be confused with the old MMIOAccess class). This class creates one memory-mapped window. On each IO operation on a configuration space of a device, it maps the requested PCI bus region to that window. Therefore it holds a SpinLock during the operation to ensure that no other PCI bus region was mapped during the call. A user can choose to either use PCI ECAM with memory-mapped window for each device, or for an entire bus. By default, the kernel prefers to map the entire PCI bus region.
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441e374396
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11 changed files with 320 additions and 100 deletions
133
Kernel/PCI/WindowedMMIOAccess.cpp
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133
Kernel/PCI/WindowedMMIOAccess.cpp
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/*
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* Copyright (c) 2020-2021, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <AK/Optional.h>
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#include <AK/StringView.h>
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#include <Kernel/Debug.h>
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#include <Kernel/PCI/WindowedMMIOAccess.h>
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#include <Kernel/VM/MemoryManager.h>
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namespace Kernel {
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namespace PCI {
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UNMAP_AFTER_INIT DeviceConfigurationSpaceMapping::DeviceConfigurationSpaceMapping(Address device_address, const MMIOAccess::MMIOSegment& mmio_segment)
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: m_device_address(device_address)
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, m_mapped_region(MM.allocate_kernel_region(page_round_up(PCI_MMIO_CONFIG_SPACE_SIZE), "PCI MMIO Device Access", Region::Access::Read | Region::Access::Write).release_nonnull())
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{
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PhysicalAddress segment_lower_addr = mmio_segment.get_paddr();
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PhysicalAddress device_physical_mmio_space = segment_lower_addr.offset(
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PCI_MMIO_CONFIG_SPACE_SIZE * m_device_address.function() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE) * m_device_address.device() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS) * (m_device_address.bus() - mmio_segment.get_start_bus()));
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m_mapped_region->physical_page_slot(0) = PhysicalPage::create(device_physical_mmio_space, false, false);
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m_mapped_region->remap();
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}
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UNMAP_AFTER_INIT void WindowedMMIOAccess::initialize(PhysicalAddress mcfg)
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{
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if (!Access::is_initialized()) {
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new WindowedMMIOAccess(mcfg);
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dbgln_if(PCI_DEBUG, "PCI: MMIO access initialised.");
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}
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}
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UNMAP_AFTER_INIT WindowedMMIOAccess::WindowedMMIOAccess(PhysicalAddress p_mcfg)
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: MMIOAccess(p_mcfg)
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{
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dmesgln("PCI: Using MMIO (mapping per device) for PCI configuration space access");
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InterruptDisabler disabler;
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enumerate_hardware([&](const Address& address, ID) {
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m_mapped_device_regions.append(make<DeviceConfigurationSpaceMapping>(address, m_segments.get(address.seg()).value()));
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});
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}
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Optional<VirtualAddress> WindowedMMIOAccess::get_device_configuration_space(Address address)
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{
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dbgln_if(PCI_DEBUG, "PCI: Getting device configuration space for {}", address);
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for (auto& mapping : m_mapped_device_regions) {
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auto checked_address = mapping.address();
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dbgln_if(PCI_DEBUG, "PCI Device Configuration Space Mapping: Check if {} was requested", checked_address);
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if (address.seg() == checked_address.seg()
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&& address.bus() == checked_address.bus()
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&& address.device() == checked_address.device()
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&& address.function() == checked_address.function()) {
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dbgln_if(PCI_DEBUG, "PCI Device Configuration Space Mapping: Found {}", checked_address);
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return mapping.vaddr();
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}
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}
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dbgln_if(PCI_DEBUG, "PCI: No device configuration space found for {}", address);
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return {};
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}
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u8 WindowedMMIOAccess::read8_field(Address address, u32 field)
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{
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InterruptDisabler disabler;
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VERIFY(field <= 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 8-bit field {:#08x} for {}", field, address);
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return *((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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}
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u16 WindowedMMIOAccess::read16_field(Address address, u32 field)
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{
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InterruptDisabler disabler;
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VERIFY(field < 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 16-bit field {:#08x} for {}", field, address);
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return *((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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}
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u32 WindowedMMIOAccess::read32_field(Address address, u32 field)
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{
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InterruptDisabler disabler;
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VERIFY(field <= 0xffc);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 32-bit field {:#08x} for {}", field, address);
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return *((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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}
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void WindowedMMIOAccess::write8_field(Address address, u32 field, u8 value)
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{
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InterruptDisabler disabler;
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VERIFY(field <= 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 8-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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*((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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}
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void WindowedMMIOAccess::write16_field(Address address, u32 field, u16 value)
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{
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InterruptDisabler disabler;
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VERIFY(field < 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 16-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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*((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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}
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void WindowedMMIOAccess::write32_field(Address address, u32 field, u32 value)
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{
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InterruptDisabler disabler;
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VERIFY(field <= 0xffc);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 32-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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*((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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}
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}
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}
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