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Kernel: Move Kernel/Memory/ code into Kernel::Memory namespace

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This commit is contained in:
Andreas Kling 2021-08-06 13:49:36 +02:00
parent a1d7ebf85a
commit 93d98d4976
153 changed files with 473 additions and 467 deletions
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4
Kernel/Storage/AHCIController.cpp
View file

@ -124,9 +124,9 @@ AHCI::HBADefinedCapabilities AHCIController::capabilities() const
};
}
NonnullOwnPtr<Region> AHCIController::default_hba_region() const
NonnullOwnPtr<Memory::Region> AHCIController::default_hba_region() const
{
auto region = MM.allocate_kernel_region(PhysicalAddress(PCI::get_BAR5(pci_address())).page_base(), page_round_up(sizeof(AHCI::HBA)), "AHCI HBA", Region::Access::Read | Region::Access::Write);
auto region = MM.allocate_kernel_region(PhysicalAddress(PCI::get_BAR5(pci_address())).page_base(), Memory::page_round_up(sizeof(AHCI::HBA)), "AHCI HBA", Memory::Region::Access::Read | Memory::Region::Access::Write);
return region.release_nonnull();
}

4
Kernel/Storage/AHCIController.h
View file

@ -48,10 +48,10 @@ private:
RefPtr<StorageDevice> device_by_port(u32 index) const;
volatile AHCI::PortRegisters& port(size_t port_number) const;
UNMAP_AFTER_INIT NonnullOwnPtr<Region> default_hba_region() const;
UNMAP_AFTER_INIT NonnullOwnPtr<Memory::Region> default_hba_region() const;
volatile AHCI::HBA& hba() const;
NonnullOwnPtr<Region> m_hba_region;
NonnullOwnPtr<Memory::Region> m_hba_region;
AHCI::HBADefinedCapabilities m_capabilities;
NonnullRefPtrVector<AHCIPortHandler> m_handlers;
};

16
Kernel/Storage/AHCIPort.cpp
View file

@ -50,7 +50,7 @@ AHCIPort::AHCIPort(const AHCIPortHandler& handler, volatile AHCI::PortRegisters&
for (size_t index = 0; index < 1; index++) {
m_command_table_pages.append(MM.allocate_supervisor_physical_page().release_nonnull());
}
m_command_list_region = MM.allocate_kernel_region(m_command_list_page->paddr(), PAGE_SIZE, "AHCI Port Command List", Region::Access::Read | Region::Access::Write, Region::Cacheable::No);
m_command_list_region = MM.allocate_kernel_region(m_command_list_page->paddr(), PAGE_SIZE, "AHCI Port Command List", Memory::Region::Access::Read | Memory::Region::Access::Write, Memory::Region::Cacheable::No);
dbgln_if(AHCI_DEBUG, "AHCI Port {}: Command list region at {}", representative_port_index(), m_command_list_region->vaddr());
}
@ -159,7 +159,7 @@ void AHCIPort::eject()
// handshake error bit in PxSERR register if CFL is incorrect.
command_list_entries[unused_command_header.value()].attributes = (size_t)FIS::DwordCount::RegisterHostToDevice | AHCI::CommandHeaderAttributes::P | AHCI::CommandHeaderAttributes::C | AHCI::CommandHeaderAttributes::A;
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Region::Access::Read | Region::Access::Write, Region::Cacheable::No);
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::Read | Memory::Region::Access::Write, Memory::Region::Cacheable::No);
auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
memset(const_cast<u8*>(command_table.command_fis), 0, 64);
auto& fis = *(volatile FIS::HostToDevice::Register*)command_table.command_fis;
@ -268,7 +268,7 @@ bool AHCIPort::initialize(ScopedSpinLock<SpinLock<u8>>& main_lock)
size_t physical_sector_size = 512;
u64 max_addressable_sector = 0;
if (identify_device(main_lock)) {
auto identify_block = map_typed<ATAIdentifyBlock>(m_parent_handler->get_identify_metadata_physical_region(m_port_index));
auto identify_block = Memory::map_typed<ATAIdentifyBlock>(m_parent_handler->get_identify_metadata_physical_region(m_port_index));
// Check if word 106 is valid before using it!
if ((identify_block->physical_sector_size_to_logical_sector_size >> 14) == 1) {
if (identify_block->physical_sector_size_to_logical_sector_size & (1 << 12)) {
@ -422,7 +422,7 @@ void AHCIPort::set_sleep_state() const
size_t AHCIPort::calculate_descriptors_count(size_t block_count) const
{
VERIFY(m_connected_device);
size_t needed_dma_regions_count = page_round_up((block_count * m_connected_device->block_size())) / PAGE_SIZE;
size_t needed_dma_regions_count = Memory::page_round_up((block_count * m_connected_device->block_size())) / PAGE_SIZE;
VERIFY(needed_dma_regions_count <= m_dma_buffers.size());
return needed_dma_regions_count;
}
@ -432,12 +432,12 @@ Optional<AsyncDeviceRequest::RequestResult> AHCIPort::prepare_and_set_scatter_li
VERIFY(m_lock.is_locked());
VERIFY(request.block_count() > 0);
NonnullRefPtrVector<PhysicalPage> allocated_dma_regions;
NonnullRefPtrVector<Memory::PhysicalPage> allocated_dma_regions;
for (size_t index = 0; index < calculate_descriptors_count(request.block_count()); index++) {
allocated_dma_regions.append(m_dma_buffers.at(index));
}
m_current_scatter_list = ScatterGatherList::try_create(request, allocated_dma_regions.span(), m_connected_device->block_size());
m_current_scatter_list = Memory::ScatterGatherList::try_create(request, allocated_dma_regions.span(), m_connected_device->block_size());
if (!m_current_scatter_list)
return AsyncDeviceRequest::Failure;
if (request.request_type() == AsyncBlockDeviceRequest::Write) {
@ -526,7 +526,7 @@ bool AHCIPort::access_device(AsyncBlockDeviceRequest::RequestType direction, u64
dbgln_if(AHCI_DEBUG, "AHCI Port {}: CLE: ctba={:#08x}, ctbau={:#08x}, prdbc={:#08x}, prdtl={:#04x}, attributes={:#04x}", representative_port_index(), (u32)command_list_entries[unused_command_header.value()].ctba, (u32)command_list_entries[unused_command_header.value()].ctbau, (u32)command_list_entries[unused_command_header.value()].prdbc, (u16)command_list_entries[unused_command_header.value()].prdtl, (u16)command_list_entries[unused_command_header.value()].attributes);
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Region::Access::Read | Region::Access::Write, Region::Cacheable::No);
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::Read | Memory::Region::Access::Write, Memory::Region::Cacheable::No);
auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
dbgln_if(AHCI_DEBUG, "AHCI Port {}: Allocated command table at {}", representative_port_index(), command_table_region->vaddr());
@ -610,7 +610,7 @@ bool AHCIPort::identify_device(ScopedSpinLock<SpinLock<u8>>& main_lock)
// QEMU doesn't care if we don't set the correct CFL field in this register, real hardware will set an handshake error bit in PxSERR register.
command_list_entries[unused_command_header.value()].attributes = (size_t)FIS::DwordCount::RegisterHostToDevice | AHCI::CommandHeaderAttributes::P;
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Region::Access::Read | Region::Access::Write);
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::Read | Memory::Region::Access::Write);
auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
memset(const_cast<u8*>(command_table.command_fis), 0, 64);
command_table.descriptors[0].base_high = 0;

12
Kernel/Storage/AHCIPort.h
View file

@ -107,11 +107,11 @@ private:
mutable bool m_wait_for_completion { false };
bool m_wait_connect_for_completion { false };
NonnullRefPtrVector<PhysicalPage> m_dma_buffers;
NonnullRefPtrVector<PhysicalPage> m_command_table_pages;
RefPtr<PhysicalPage> m_command_list_page;
OwnPtr<Region> m_command_list_region;
RefPtr<PhysicalPage> m_fis_receive_page;
NonnullRefPtrVector<Memory::PhysicalPage> m_dma_buffers;
NonnullRefPtrVector<Memory::PhysicalPage> m_command_table_pages;
RefPtr<Memory::PhysicalPage> m_command_list_page;
OwnPtr<Memory::Region> m_command_list_region;
RefPtr<Memory::PhysicalPage> m_fis_receive_page;
RefPtr<StorageDevice> m_connected_device;
u32 m_port_index;
@ -120,7 +120,7 @@ private:
AHCI::PortInterruptStatusBitField m_interrupt_status;
AHCI::PortInterruptEnableBitField m_interrupt_enable;
RefPtr<ScatterGatherList> m_current_scatter_list;
RefPtr<Memory::ScatterGatherList> m_current_scatter_list;
bool m_disabled_by_firmware { false };
};
}

2
Kernel/Storage/AHCIPortHandler.h
View file

@ -66,7 +66,7 @@ private:
// Data members
HashMap<u32, NonnullRefPtr<AHCIPort>> m_handled_ports;
NonnullRefPtr<AHCIController> m_parent_controller;
NonnullRefPtrVector<PhysicalPage> m_identify_metadata_pages;
NonnullRefPtrVector<Memory::PhysicalPage> m_identify_metadata_pages;
AHCI::MaskedBitField m_taken_ports;
AHCI::MaskedBitField m_pending_ports_interrupts;
};

4
Kernel/Storage/BMIDEChannel.cpp
View file

@ -43,8 +43,8 @@ UNMAP_AFTER_INIT void BMIDEChannel::initialize()
m_dma_buffer_page = MM.allocate_supervisor_physical_page();
if (m_dma_buffer_page.is_null() || m_prdt_page.is_null())
return;
m_prdt_region = MM.allocate_kernel_region(m_prdt_page->paddr(), PAGE_SIZE, "IDE PRDT", Region::Access::Read | Region::Access::Write);
m_dma_buffer_region = MM.allocate_kernel_region(m_dma_buffer_page->paddr(), PAGE_SIZE, "IDE DMA region", Region::Access::Read | Region::Access::Write);
m_prdt_region = MM.allocate_kernel_region(m_prdt_page->paddr(), PAGE_SIZE, "IDE PRDT", Memory::Region::Access::Read | Memory::Region::Access::Write);
m_dma_buffer_region = MM.allocate_kernel_region(m_dma_buffer_page->paddr(), PAGE_SIZE, "IDE DMA region", Memory::Region::Access::Read | Memory::Region::Access::Write);
prdt().end_of_table = 0x8000;
// clear bus master interrupt status

8
Kernel/Storage/BMIDEChannel.h
View file

@ -47,9 +47,9 @@ private:
virtual void ata_write_sectors(bool, u16) override;
PhysicalRegionDescriptor& prdt() { return *reinterpret_cast<PhysicalRegionDescriptor*>(m_prdt_region->vaddr().as_ptr()); }
OwnPtr<Region> m_prdt_region;
OwnPtr<Region> m_dma_buffer_region;
RefPtr<PhysicalPage> m_prdt_page;
RefPtr<PhysicalPage> m_dma_buffer_page;
OwnPtr<Memory::Region> m_prdt_region;
OwnPtr<Memory::Region> m_dma_buffer_region;
RefPtr<Memory::PhysicalPage> m_prdt_page;
RefPtr<Memory::PhysicalPage> m_dma_buffer_page;
};
}

8
Kernel/Storage/RamdiskController.cpp
View file

@ -46,10 +46,10 @@ RamdiskController::RamdiskController()
{
// Populate ramdisk controllers from Multiboot boot modules, if any.
size_t count = 0;
for (auto& used_memory_range : MemoryManager::the().used_memory_ranges()) {
if (used_memory_range.type == UsedMemoryRangeType::BootModule) {
size_t length = page_round_up(used_memory_range.end.get()) - used_memory_range.start.get();
auto region = MemoryManager::the().allocate_kernel_region(used_memory_range.start, length, "Ramdisk", Region::Access::Read | Region::Access::Write);
for (auto& used_memory_range : MM.used_memory_ranges()) {
if (used_memory_range.type == Memory::UsedMemoryRangeType::BootModule) {
size_t length = Memory::page_round_up(used_memory_range.end.get()) - used_memory_range.start.get();
auto region = MM.allocate_kernel_region(used_memory_range.start, length, "Ramdisk", Memory::Region::Access::Read | Memory::Region::Access::Write);
if (!region)
dmesgln("RamdiskController: Failed to allocate kernel region of size {}", length);
else

4
Kernel/Storage/RamdiskDevice.cpp
View file

@ -12,12 +12,12 @@
namespace Kernel {
NonnullRefPtr<RamdiskDevice> RamdiskDevice::create(const RamdiskController& controller, NonnullOwnPtr<Region>&& region, int major, int minor)
NonnullRefPtr<RamdiskDevice> RamdiskDevice::create(const RamdiskController& controller, NonnullOwnPtr<Memory::Region>&& region, int major, int minor)
{
return adopt_ref(*new RamdiskDevice(controller, move(region), major, minor));
}
RamdiskDevice::RamdiskDevice(const RamdiskController& controller, NonnullOwnPtr<Region>&& region, int major, int minor)
RamdiskDevice::RamdiskDevice(const RamdiskController& controller, NonnullOwnPtr<Memory::Region>&& region, int major, int minor)
: StorageDevice(controller, major, minor, 512, region->size() / 512)
, m_region(move(region))
{

6
Kernel/Storage/RamdiskDevice.h
View file

@ -17,8 +17,8 @@ class RamdiskDevice final : public StorageDevice {
friend class RamdiskController;
AK_MAKE_ETERNAL
public:
static NonnullRefPtr<RamdiskDevice> create(const RamdiskController&, NonnullOwnPtr<Region>&& region, int major, int minor);
RamdiskDevice(const RamdiskController&, NonnullOwnPtr<Region>&&, int major, int minor);
static NonnullRefPtr<RamdiskDevice> create(const RamdiskController&, NonnullOwnPtr<Memory::Region>&& region, int major, int minor);
RamdiskDevice(const RamdiskController&, NonnullOwnPtr<Memory::Region>&&, int major, int minor);
virtual ~RamdiskDevice() override;
// ^BlockDevice
@ -32,7 +32,7 @@ public:
Mutex m_lock { "RamdiskDevice" };
NonnullOwnPtr<Region> m_region;
NonnullOwnPtr<Memory::Region> m_region;
};
}