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Kernel: Implement AVX XSAVE support

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This adds some new buffers to the `FPUState` struct, which contains
enough space for the `xsave` instruction to run. This instruction writes
the upper part of the x86 SIMD registers (YMM0-15) to a seperate
256-byte area, as well as an "xsave header" describing the region.

If the underlying processor supports AVX, the `fxsave` instruction is no
longer used, as `xsave` itself implictly saves all of the SSE and x87
registers.

Co-authored-by: Leon Albrecht <leon.a@serenityos.org>
This commit is contained in:
Jesse Buhagiar 2022-04-25 23:09:57 +10:00 • committed by Andreas Kling
parent c00ae53b66
commit 964f8fbf3a
3 changed files with 106 additions and 8 deletions
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11
Kernel/Arch/x86/Processor.h
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@ -17,6 +17,7 @@
#include <Kernel/Arch/x86/ASM_wrapper.h>
#include <Kernel/Arch/x86/CPUID.h>
#include <Kernel/Arch/x86/DescriptorTable.h>
#include <Kernel/Arch/x86/SIMDState.h>
#include <Kernel/Arch/x86/TSS.h>
#include <Kernel/Forward.h>
#include <Kernel/KString.h>
@ -46,9 +47,15 @@ extern "C" void thread_context_first_enter(void);
extern "C" void exit_kernel_thread(void);
extern "C" void do_assume_context(Thread* thread, u32 flags);
struct [[gnu::aligned(16)]] FPUState
struct [[gnu::aligned(64), gnu::packed]] FPUState
{
u8 buffer[512];
SIMD::LegacyRegion legacy_region;
SIMD::Header xsave_header;
// FIXME: This should be dynamically allocated! For now, we only save the `YMM` registers here,
// so this will do for now. The size of the area is queried via CPUID(EAX=0dh, ECX=2):EAX.
// https://www.intel.com/content/dam/develop/external/us/en/documents/36945
u8 ext_save_area[256];
};
class Processor;