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UserspaceEmulator+LibX86: Implement the LEA instruction

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This piggybacks nicely on Instruction's ModR/M resolution code. :^)
This commit is contained in:
Andreas Kling 2020-07-11 21:36:25 +02:00
parent 9257657340
commit 97f4cebc8d
2 changed files with 19 additions and 10 deletions
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13
DevTools/UserspaceEmulator/SoftCPU.cpp
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@ -625,8 +625,17 @@ void SoftCPU::LDS_reg16_mem16(const X86::Instruction&) { TODO(); }
void SoftCPU::LDS_reg32_mem32(const X86::Instruction&) { TODO(); } void SoftCPU::LDS_reg32_mem32(const X86::Instruction&) { TODO(); }
void SoftCPU::LEAVE16(const X86::Instruction&) { TODO(); } void SoftCPU::LEAVE16(const X86::Instruction&) { TODO(); }
void SoftCPU::LEAVE32(const X86::Instruction&) { TODO(); } void SoftCPU::LEAVE32(const X86::Instruction&) { TODO(); }
void SoftCPU::LEA_reg16_mem16(const X86::Instruction&) { TODO(); }
void SoftCPU::LEA_reg32_mem32(const X86::Instruction&) { TODO(); } void SoftCPU::LEA_reg16_mem16(const X86::Instruction& insn)
{
gpr16(insn.reg16()) = insn.modrm().resolve(*this, insn.segment_prefix()).offset();
}
void SoftCPU::LEA_reg32_mem32(const X86::Instruction& insn)
{
gpr32(insn.reg32()) = insn.modrm().resolve(*this, insn.segment_prefix()).offset();
}
void SoftCPU::LES_reg16_mem16(const X86::Instruction&) { TODO(); } void SoftCPU::LES_reg16_mem16(const X86::Instruction&) { TODO(); }
void SoftCPU::LES_reg32_mem32(const X86::Instruction&) { TODO(); } void SoftCPU::LES_reg32_mem32(const X86::Instruction&) { TODO(); }
void SoftCPU::LFS_reg16_mem16(const X86::Instruction&) { TODO(); } void SoftCPU::LFS_reg16_mem16(const X86::Instruction&) { TODO(); }

16
Libraries/LibX86/Instruction.h
View file

@ -218,6 +218,14 @@ public:
template<typename CPU> template<typename CPU>
u32 read32(CPU&, const Instruction&); u32 read32(CPU&, const Instruction&);
template<typename CPU>
LogicalAddress resolve(const CPU& cpu, Optional<SegmentRegister> segment_prefix)
{
if (m_a32)
return resolve32(cpu, segment_prefix);
return resolve16(cpu, segment_prefix);
}
private: private:
MemoryOrRegisterReference() { } MemoryOrRegisterReference() { }
@ -234,14 +242,6 @@ private:
template<typename CPU> template<typename CPU>
LogicalAddress resolve32(const CPU&, Optional<SegmentRegister>); LogicalAddress resolve32(const CPU&, Optional<SegmentRegister>);
template<typename CPU>
LogicalAddress resolve(const CPU& cpu, Optional<SegmentRegister> segment_prefix)
{
if (m_a32)
return resolve32(cpu, segment_prefix);
return resolve16(cpu, segment_prefix);
}
template<typename CPU> template<typename CPU>
u32 evaluate_sib(const CPU&, SegmentRegister& default_segment) const; u32 evaluate_sib(const CPU&, SegmentRegister& default_segment) const;