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UserspaceEmulator+LibX86: Implement the LEA instruction
This piggybacks nicely on Instruction's ModR/M resolution code. :^)
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9257657340
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2 changed files with 19 additions and 10 deletions
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@ -625,8 +625,17 @@ void SoftCPU::LDS_reg16_mem16(const X86::Instruction&) { TODO(); }
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void SoftCPU::LDS_reg32_mem32(const X86::Instruction&) { TODO(); }
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void SoftCPU::LDS_reg32_mem32(const X86::Instruction&) { TODO(); }
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void SoftCPU::LEAVE16(const X86::Instruction&) { TODO(); }
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void SoftCPU::LEAVE16(const X86::Instruction&) { TODO(); }
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void SoftCPU::LEAVE32(const X86::Instruction&) { TODO(); }
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void SoftCPU::LEAVE32(const X86::Instruction&) { TODO(); }
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void SoftCPU::LEA_reg16_mem16(const X86::Instruction&) { TODO(); }
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void SoftCPU::LEA_reg32_mem32(const X86::Instruction&) { TODO(); }
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void SoftCPU::LEA_reg16_mem16(const X86::Instruction& insn)
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{
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gpr16(insn.reg16()) = insn.modrm().resolve(*this, insn.segment_prefix()).offset();
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}
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void SoftCPU::LEA_reg32_mem32(const X86::Instruction& insn)
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{
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gpr32(insn.reg32()) = insn.modrm().resolve(*this, insn.segment_prefix()).offset();
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}
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void SoftCPU::LES_reg16_mem16(const X86::Instruction&) { TODO(); }
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void SoftCPU::LES_reg16_mem16(const X86::Instruction&) { TODO(); }
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void SoftCPU::LES_reg32_mem32(const X86::Instruction&) { TODO(); }
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void SoftCPU::LES_reg32_mem32(const X86::Instruction&) { TODO(); }
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void SoftCPU::LFS_reg16_mem16(const X86::Instruction&) { TODO(); }
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void SoftCPU::LFS_reg16_mem16(const X86::Instruction&) { TODO(); }
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@ -218,6 +218,14 @@ public:
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template<typename CPU>
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template<typename CPU>
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u32 read32(CPU&, const Instruction&);
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u32 read32(CPU&, const Instruction&);
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template<typename CPU>
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LogicalAddress resolve(const CPU& cpu, Optional<SegmentRegister> segment_prefix)
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{
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if (m_a32)
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return resolve32(cpu, segment_prefix);
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return resolve16(cpu, segment_prefix);
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}
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private:
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private:
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MemoryOrRegisterReference() { }
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MemoryOrRegisterReference() { }
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@ -234,14 +242,6 @@ private:
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template<typename CPU>
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template<typename CPU>
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LogicalAddress resolve32(const CPU&, Optional<SegmentRegister>);
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LogicalAddress resolve32(const CPU&, Optional<SegmentRegister>);
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template<typename CPU>
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LogicalAddress resolve(const CPU& cpu, Optional<SegmentRegister> segment_prefix)
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{
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if (m_a32)
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return resolve32(cpu, segment_prefix);
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return resolve16(cpu, segment_prefix);
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}
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template<typename CPU>
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template<typename CPU>
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u32 evaluate_sib(const CPU&, SegmentRegister& default_segment) const;
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u32 evaluate_sib(const CPU&, SegmentRegister& default_segment) const;
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