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Kernel: Add the NonMaskableInterruptDisabler class

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This class will be used later to disable NMIs when we
initialize the RTC timer.
This commit is contained in:
Liav A 2020-02-26 02:04:05 +02:00 • committed by Andreas Kling
parent 07679e347c
commit 9a303cc5a5
2 changed files with 17 additions and 0 deletions
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11
Kernel/Arch/i386/CPU.cpp
View file

@ -39,6 +39,7 @@
#include <Kernel/KSyms.h> #include <Kernel/KSyms.h>
#include <Kernel/Process.h> #include <Kernel/Process.h>
#include <Kernel/VM/MemoryManager.h> #include <Kernel/VM/MemoryManager.h>
#include <LibBareMetal/IO.h>
#include <LibC/mallocdefs.h> #include <LibC/mallocdefs.h>
//#define PAGE_FAULT_DEBUG //#define PAGE_FAULT_DEBUG
@ -833,3 +834,13 @@ void __assertion_failed(const char* msg, const char* file, unsigned line, const
; ;
} }
#endif #endif
NonMaskableInterruptDisabler::NonMaskableInterruptDisabler()
{
IO::out8(0x70, IO::in8(0x70) | 0x80);
}
NonMaskableInterruptDisabler::~NonMaskableInterruptDisabler()
{
IO::out8(0x70, IO::in8(0x70) & 0x7F);
}

6
Kernel/Arch/i386/CPU.h
View file

@ -369,6 +369,12 @@ private:
u32 m_flags; u32 m_flags;
}; };
class NonMaskableInterruptDisabler {
public:
NonMaskableInterruptDisabler();
~NonMaskableInterruptDisabler();
};
/* Map IRQ0-15 @ ISR 0x50-0x5F */ /* Map IRQ0-15 @ ISR 0x50-0x5F */
#define IRQ_VECTOR_BASE 0x50 #define IRQ_VECTOR_BASE 0x50