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Everywhere: Change all XXX into FIXME or remove as appropriate

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This commit is contained in:
Ben Wiederhake 2023-02-15 21:31:00 +01:00 • committed by Jelle Raaijmakers
parent 00c21c5424
commit 9a7b3c145f
4 changed files with 10 additions and 10 deletions
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8
Kernel/Arch/aarch64/CPUID.cpp
View file

@ -196,11 +196,11 @@ CPUFeature::Type detect_cpu_features()
features |= CPUFeature::MTE3; features |= CPUFeature::MTE3;
if (processor_feature_register_1.MTE >= 0b0010 && processor_feature_register_1.MTEX == 0b0001) { if (processor_feature_register_1.MTE >= 0b0010 && processor_feature_register_1.MTEX == 0b0001) {
features |= CPUFeature::MTE4; features |= CPUFeature::MTE4;
features |= CPUFeature::MTE_CANONICAL_TAGS; // XXX: not really explicit in the spec features |= CPUFeature::MTE_CANONICAL_TAGS; // FIXME: not really explicit in the spec
features |= CPUFeature::MTE_NO_ADDRESS_TAGS; // XXX: not really explicit in the spec features |= CPUFeature::MTE_NO_ADDRESS_TAGS; // FIXME: not really explicit in the spec
} }
if (processor_feature_register_1.MTE >= 0b0011 && processor_feature_register_1.MTE_frac == 0b0000) if (processor_feature_register_1.MTE >= 0b0011 && processor_feature_register_1.MTE_frac == 0b0000)
features |= CPUFeature::MTE_ASYM_FAULT; // XXX: not really explicit in the spec features |= CPUFeature::MTE_ASYM_FAULT; // FIXME: not really explicit in the spec
if (processor_feature_register_1.SME == 0b0010) if (processor_feature_register_1.SME == 0b0010)
features |= CPUFeature::SME2; features |= CPUFeature::SME2;
if (processor_feature_register_1.RNDR_trap == 0b0001) if (processor_feature_register_1.RNDR_trap == 0b0001)
@ -427,7 +427,7 @@ CPUFeature::Type detect_cpu_features()
features |= CPUFeature::BRBE; features |= CPUFeature::BRBE;
if (debug_feature_register_0.BRBE == 0b0010) if (debug_feature_register_0.BRBE == 0b0010)
features |= CPUFeature::BRBEv1p1; features |= CPUFeature::BRBEv1p1;
if (debug_feature_register_0.ExtTrcBuff == 0b0001 && features.has_flag(CPUFeature::TRBE)) // XXX: order-dependent! if (debug_feature_register_0.ExtTrcBuff == 0b0001 && features.has_flag(CPUFeature::TRBE)) // FIXME: order-dependent!
features |= CPUFeature::TRBE_EXT; features |= CPUFeature::TRBE_EXT;
if (debug_feature_register_0.HPMN0 == 0b0001) if (debug_feature_register_0.HPMN0 == 0b0001)
features |= CPUFeature::HPMN0; features |= CPUFeature::HPMN0;

2
Kernel/Arch/aarch64/CPUID.h
View file

@ -270,7 +270,7 @@ AK_MAKE_ARBITRARY_SIZED_ENUM(CPUFeature, u256,
TRBE = CPUFeature(1u) << 239u, // Trace Buffer Extension TRBE = CPUFeature(1u) << 239u, // Trace Buffer Extension
SME = CPUFeature(1u) << 240u, // Scalable Matrix Extension SME = CPUFeature(1u) << 240u, // Scalable Matrix Extension
__End = CPUFeature(1u) << 255u); // XXX — SENTINEL VALUE — XXX __End = CPUFeature(1u) << 255u); // SENTINEL VALUE
enum class ArmLimited { // 0x41 enum class ArmLimited { // 0x41
Cortex_A34 = 0xd02, Cortex_A34 = 0xd02,

8
Userland/DevTools/UserspaceEmulator/SoftFPU.cpp
View file

@ -437,7 +437,7 @@ void SoftFPU::FCMOVNU(const X86::Instruction& insn)
// BASIC ARITHMETIC // BASIC ARITHMETIC
void SoftFPU::FADD_RM32(const X86::Instruction& insn) void SoftFPU::FADD_RM32(const X86::Instruction& insn)
{ {
// XXX look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem32 ops // FIXME look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem32 ops
if (insn.modrm().is_register()) { if (insn.modrm().is_register()) {
fpu_set(0, fpu_get(insn.modrm().register_index()) + fpu_get(0)); fpu_set(0, fpu_get(insn.modrm().register_index()) + fpu_get(0));
} else { } else {
@ -449,7 +449,7 @@ void SoftFPU::FADD_RM32(const X86::Instruction& insn)
} }
void SoftFPU::FADD_RM64(const X86::Instruction& insn) void SoftFPU::FADD_RM64(const X86::Instruction& insn)
{ {
// XXX look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem64 ops // FIXME look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem64 ops
if (insn.modrm().is_register()) { if (insn.modrm().is_register()) {
fpu_set(insn.modrm().register_index(), fpu_get(insn.modrm().register_index()) + fpu_get(0)); fpu_set(insn.modrm().register_index(), fpu_get(insn.modrm().register_index()) + fpu_get(0));
} else { } else {
@ -573,7 +573,7 @@ void SoftFPU::FISUBR_RM32(const X86::Instruction& insn)
void SoftFPU::FMUL_RM32(const X86::Instruction& insn) void SoftFPU::FMUL_RM32(const X86::Instruction& insn)
{ {
// XXX look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem32 ops // FIXME look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem32 ops
if (insn.modrm().is_register()) { if (insn.modrm().is_register()) {
fpu_set(0, fpu_get(0) * fpu_get(insn.modrm().register_index())); fpu_set(0, fpu_get(0) * fpu_get(insn.modrm().register_index()));
} else { } else {
@ -585,7 +585,7 @@ void SoftFPU::FMUL_RM32(const X86::Instruction& insn)
} }
void SoftFPU::FMUL_RM64(const X86::Instruction& insn) void SoftFPU::FMUL_RM64(const X86::Instruction& insn)
{ {
// XXX look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem64 ops // FIXME look at ::INC_foo for how mem/reg stuff is handled, and use that here too to make sure this is only called for mem64 ops
if (insn.modrm().is_register()) { if (insn.modrm().is_register()) {
fpu_set(insn.modrm().register_index(), fpu_get(insn.modrm().register_index()) * fpu_get(0)); fpu_set(insn.modrm().register_index(), fpu_get(insn.modrm().register_index()) * fpu_get(0));
} else { } else {

2
Userland/Libraries/LibC/elf.h
View file

@ -685,7 +685,7 @@ struct elfcore_procinfo {
}; };
/* /*
* XXX - these _KERNEL items aren't part of the ABI! * FIXME - these _KERNEL items aren't part of the ABI!
*/ */
#if defined(_KERNEL) || defined(_DYN_LOADER) #if defined(_KERNEL) || defined(_DYN_LOADER)