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https://github.com/RGBCube/serenity
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Kernel: Consolidate features into CPUFeature enum
This allows us to consolidate printing out all the CPU features into one log statement. Also expose them in /proc/cpuinfo
This commit is contained in:
Tom
Andreas Kling
parent
e373e5f007
commit
9b4e6f6a23
9 changed files with 197 additions and 145 deletions
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@ -26,6 +26,7 @@
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#include <AK/Assertions.h>
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#include <AK/String.h>
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#include <AK/StringBuilder.h>
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#include <AK/Types.h>
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#include <Kernel/Arch/i386/CPU.h>
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#include <Kernel/Arch/i386/ProcessorInfo.h>
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@ -633,7 +634,7 @@ void exit_trap(TrapFrame* trap)
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return Processor::current().exit_trap(*trap);
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}
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void sse_init()
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static void sse_init()
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{
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asm volatile(
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"mov %cr0, %eax\n"
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@ -645,122 +646,6 @@ void sse_init()
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"mov %eax, %cr4\n");
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}
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bool g_cpu_supports_nx;
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bool g_cpu_supports_pae;
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bool g_cpu_supports_pge;
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bool g_cpu_supports_rdrand;
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bool g_cpu_supports_rdseed;
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bool g_cpu_supports_smap;
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bool g_cpu_supports_smep;
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bool g_cpu_supports_sse;
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bool g_cpu_supports_tsc;
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bool g_cpu_supports_umip;
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void cpu_detect()
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{
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CPUID processor_info(0x1);
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g_cpu_supports_pae = (processor_info.edx() & (1 << 6));
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g_cpu_supports_pge = (processor_info.edx() & (1 << 13));
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g_cpu_supports_sse = (processor_info.edx() & (1 << 25));
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g_cpu_supports_tsc = (processor_info.edx() & (1 << 4));
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g_cpu_supports_rdrand = (processor_info.ecx() & (1 << 30));
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CPUID extended_processor_info(0x80000001);
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g_cpu_supports_nx = (extended_processor_info.edx() & (1 << 20));
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CPUID extended_features(0x7);
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g_cpu_supports_smap = (extended_features.ebx() & (1 << 20));
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g_cpu_supports_smep = (extended_features.ebx() & (1 << 7));
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g_cpu_supports_umip = (extended_features.ecx() & (1 << 2));
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g_cpu_supports_rdseed = (extended_features.ebx() & (1 << 18));
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}
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void cpu_setup(u32 cpu)
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{
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if (cpu == 0)
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cpu_detect();
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if (g_cpu_supports_sse) {
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sse_init();
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klog() << "x86: SSE support enabled";
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}
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asm volatile(
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"movl %%cr0, %%eax\n"
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"orl $0x00010000, %%eax\n"
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"movl %%eax, %%cr0\n" ::
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: "%eax", "memory");
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klog() << "x86: WP support enabled";
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if (g_cpu_supports_pge) {
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// Turn on CR4.PGE so the CPU will respect the G bit in page tables.
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x80, %eax\n"
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"mov %eax, %cr4\n");
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klog() << "x86: PGE support enabled";
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} else {
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klog() << "x86: PGE support not detected";
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}
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if (g_cpu_supports_nx) {
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// Turn on IA32_EFER.NXE
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asm volatile(
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"movl $0xc0000080, %ecx\n"
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"rdmsr\n"
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"orl $0x800, %eax\n"
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"wrmsr\n");
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klog() << "x86: NX support enabled";
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} else {
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klog() << "x86: NX support not detected";
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}
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if (g_cpu_supports_smep) {
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// Turn on CR4.SMEP
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x100000, %eax\n"
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"mov %eax, %cr4\n");
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klog() << "x86: SMEP support enabled";
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} else {
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klog() << "x86: SMEP support not detected";
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}
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if (g_cpu_supports_smap) {
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// Turn on CR4.SMAP
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klog() << "x86: Enabling SMAP";
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x200000, %eax\n"
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"mov %eax, %cr4\n");
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klog() << "x86: SMAP support enabled";
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} else {
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klog() << "x86: SMAP support not detected";
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}
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if (g_cpu_supports_umip) {
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x800, %eax\n"
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"mov %eax, %cr4\n");
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klog() << "x86: UMIP support enabled";
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}
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if (g_cpu_supports_tsc) {
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x4, %eax\n"
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"mov %eax, %cr4\n");
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klog() << "x86: RDTSC support restricted";
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}
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if (g_cpu_supports_rdrand) {
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klog() << "x86: Using RDRAND for good randomness";
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} else {
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klog() << "x86: No RDRAND support detected, randomness will be poor";
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}
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}
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u32 read_cr0()
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{
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u32 cr0;
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@ -822,6 +707,156 @@ Processor& Processor::by_id(u32 cpu)
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return *procs[cpu];
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}
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void Processor::cpu_detect()
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{
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// NOTE: This is called during Processor::early_initialize, we cannot
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// safely log at this point because we don't have kmalloc
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// initialized yet!
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auto set_feature =
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[&](CPUFeature f) {
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m_features = static_cast<CPUFeature>(static_cast<u32>(m_features) | static_cast<u32>(f));
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};
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m_features = static_cast<CPUFeature>(0);
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CPUID processor_info(0x1);
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if (processor_info.edx() & (1 << 6))
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set_feature(CPUFeature::PAE);
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if (processor_info.edx() & (1 << 13))
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set_feature(CPUFeature::PGE);
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if (processor_info.edx() & (1 << 25))
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set_feature(CPUFeature::SSE);
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if (processor_info.edx() & (1 << 4))
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set_feature(CPUFeature::TSC);
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if (processor_info.ecx() & (1 << 30))
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set_feature(CPUFeature::RDRAND);
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CPUID extended_processor_info(0x80000001);
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if (extended_processor_info.edx() & (1 << 20))
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set_feature(CPUFeature::NX);
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CPUID extended_features(0x7);
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if (extended_features.ebx() & (1 << 20))
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set_feature(CPUFeature::SMAP);
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if (extended_features.ebx() & (1 << 7))
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set_feature(CPUFeature::SMEP);
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if (extended_features.ecx() & (1 << 2))
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set_feature(CPUFeature::UMIP);
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if (extended_features.ebx() & (1 << 18))
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set_feature(CPUFeature::RDSEED);
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}
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void Processor::cpu_setup()
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{
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// NOTE: This is called during Processor::early_initialize, we cannot
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// safely log at this point because we don't have kmalloc
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// initialized yet!
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cpu_detect();
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if (has_feature(CPUFeature::SSE))
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sse_init();
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asm volatile(
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"movl %%cr0, %%eax\n"
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"orl $0x00010000, %%eax\n"
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"movl %%eax, %%cr0\n" ::
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: "%eax", "memory");
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if (has_feature(CPUFeature::PGE)) {
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// Turn on CR4.PGE so the CPU will respect the G bit in page tables.
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x80, %eax\n"
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"mov %eax, %cr4\n");
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}
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if (has_feature(CPUFeature::NX)) {
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// Turn on IA32_EFER.NXE
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asm volatile(
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"movl $0xc0000080, %ecx\n"
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"rdmsr\n"
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"orl $0x800, %eax\n"
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"wrmsr\n");
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}
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if (has_feature(CPUFeature::SMEP)) {
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// Turn on CR4.SMEP
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x100000, %eax\n"
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"mov %eax, %cr4\n");
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}
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if (has_feature(CPUFeature::SMAP)) {
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// Turn on CR4.SMAP
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x200000, %eax\n"
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"mov %eax, %cr4\n");
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}
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if (has_feature(CPUFeature::UMIP)) {
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x800, %eax\n"
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"mov %eax, %cr4\n");
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}
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if (has_feature(CPUFeature::TSC)) {
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x4, %eax\n"
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"mov %eax, %cr4\n");
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}
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}
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String Processor::features_string() const
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{
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StringBuilder builder;
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auto feature_to_str =
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[](CPUFeature f) -> const char*
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{
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switch (f) {
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case CPUFeature::NX:
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return "nx";
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case CPUFeature::PAE:
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return "pae";
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case CPUFeature::PGE:
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return "pge";
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case CPUFeature::RDRAND:
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return "rdrand";
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case CPUFeature::RDSEED:
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return "rdseed";
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case CPUFeature::SMAP:
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return "smap";
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case CPUFeature::SMEP:
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return "smep";
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case CPUFeature::SSE:
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return "sse";
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case CPUFeature::TSC:
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return "tsc";
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case CPUFeature::UMIP:
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return "umip";
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// no default statement here intentionally so that we get
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// a warning if a new feature is forgotten to be added here
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}
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// Shouldn't ever happen
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return "???";
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};
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bool first = true;
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for (u32 flag = 1; flag < sizeof(m_features) * 8; flag <<= 1) {
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if ((static_cast<u32>(m_features) & flag) != 0) {
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if (first)
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first = false;
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else
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builder.append(' ');
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auto str = feature_to_str(static_cast<CPUFeature>(flag));
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builder.append(str, strlen(str));
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}
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}
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return builder.build();
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}
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void Processor::early_initialize(u32 cpu)
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{
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m_self = this;
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@ -838,6 +873,8 @@ void Processor::early_initialize(u32 cpu)
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m_mm_data = nullptr;
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m_info = nullptr;
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cpu_setup();
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gdt_init();
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ASSERT(¤t() == this); // sanity check
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}
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@ -847,12 +884,9 @@ void Processor::initialize(u32 cpu)
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ASSERT(m_self == this);
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ASSERT(¤t() == this); // sanity check
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m_cpu = cpu;
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m_in_irq = 0;
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m_idle_thread = nullptr;
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m_current_thread = nullptr;
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m_mm_data = nullptr;
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klog() << "CPU[" << id() << "]: Supported features: " << features_string();
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if (!has_feature(CPUFeature::RDRAND))
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klog() << "CPU[" << id() << "]: No RDRAND support detected, randomness will be poor";
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if (cpu == 0)
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idt_init();
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