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Kernel: Add the DeviceController class in the PCI subsystem
Such device is not an IRQHandler by itself, but actually a controller of many IRQ or MSI devices. The purpose of this class is to manage multiple sources of interrupts. For example, a generic ISA IDE controller controls 2 IRQ sources - 14 and 15. So, when we initialize the IDE controller, it will initialize two IDE channels (also known as PATAChannels) to utilize IRQ 14 and 15, respectively. NVMe with MSI-X support can theoretically handle up to 2048 interrupts.
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@ -28,6 +28,7 @@
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#include <AK/Function.h>
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#include <AK/LogStream.h>
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#include <AK/String.h>
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#include <AK/Types.h>
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namespace Kernel {
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@ -221,6 +222,7 @@ class Access;
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class MMIOAccess;
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class IOAccess;
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class MMIOSegment;
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class DeviceController;
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class Device;
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}
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