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Kernel: Move all Graphics-related code into Devices/GPU directory
Like the HID, Audio and Storage subsystem, the Graphics subsystem (which handles GPUs technically) exposes unix device files (typically in /dev). To ensure consistency across the repository, move all related files to a new directory under Kernel/Devices called "GPU". Also remove the redundant "GPU" word from the VirtIO driver directory, and the word "Graphics" from GraphicsManagement.{h,cpp} filenames.
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69 changed files with 167 additions and 167 deletions
123
Kernel/Devices/GPU/Intel/Auxiliary/GMBusConnector.cpp
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123
Kernel/Devices/GPU/Intel/Auxiliary/GMBusConnector.cpp
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/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/Delay.h>
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#include <Kernel/Devices/GPU/Intel/Auxiliary/GMBusConnector.h>
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#include <Kernel/Memory/PhysicalAddress.h>
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namespace Kernel {
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enum class GMBusStatus {
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TransactionCompletion,
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HardwareReady
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};
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enum GMBusCycle {
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Wait = 1,
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Stop = 4,
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};
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ErrorOr<NonnullOwnPtr<GMBusConnector>> GMBusConnector::create_with_physical_address(PhysicalAddress gmbus_start_address)
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{
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auto registers_mapping = TRY(map_typed<GMBusRegisters volatile>(gmbus_start_address, sizeof(GMBusRegisters), Memory::Region::Access::ReadWrite));
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return adopt_nonnull_own_or_enomem(new (nothrow) GMBusConnector(move(registers_mapping)));
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}
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GMBusConnector::GMBusConnector(Memory::TypedMapping<GMBusRegisters volatile> registers_mapping)
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: m_gmbus_registers(move(registers_mapping))
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{
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set_default_rate();
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set_pin_pair(PinPair::DedicatedAnalog);
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}
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bool GMBusConnector::wait_for(GMBusStatus desired_status, size_t milliseconds_timeout)
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{
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VERIFY(m_access_lock.is_locked());
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size_t milliseconds_passed = 0;
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while (1) {
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if (milliseconds_timeout < milliseconds_passed)
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return false;
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full_memory_barrier();
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u32 status = m_gmbus_registers->status;
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full_memory_barrier();
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VERIFY(!(status & (1 << 10))); // error happened
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switch (desired_status) {
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case GMBusStatus::HardwareReady:
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if (status & (1 << 11))
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return true;
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break;
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case GMBusStatus::TransactionCompletion:
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if (status & (1 << 14))
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return true;
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break;
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default:
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VERIFY_NOT_REACHED();
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}
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microseconds_delay(1000);
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milliseconds_passed++;
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}
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}
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ErrorOr<void> GMBusConnector::write(unsigned address, u32 data)
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{
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VERIFY(address < 256);
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SpinlockLocker locker(m_access_lock);
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full_memory_barrier();
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m_gmbus_registers->data = data;
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full_memory_barrier();
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m_gmbus_registers->command = ((address << 1) | (1 << 16) | (GMBusCycle::Wait << 25) | (1 << 30));
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full_memory_barrier();
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if (!wait_for(GMBusStatus::TransactionCompletion, 250))
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return Error::from_errno(EBUSY);
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return {};
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}
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void GMBusConnector::set_default_rate()
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{
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// FIXME: Verify GMBUS Rate Select is set only when GMBUS is idle
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SpinlockLocker locker(m_access_lock);
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// Set the rate to 100KHz
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m_gmbus_registers->clock = m_gmbus_registers->clock & ~(0b111 << 8);
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}
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void GMBusConnector::set_pin_pair(PinPair pin_pair)
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{
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// FIXME: Verify GMBUS is idle
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SpinlockLocker locker(m_access_lock);
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m_gmbus_registers->clock = (m_gmbus_registers->clock & (~0b111)) | (pin_pair & 0b111);
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}
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ErrorOr<void> GMBusConnector::read(unsigned address, u8* buf, size_t length)
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{
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VERIFY(address < 256);
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SpinlockLocker locker(m_access_lock);
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size_t nread = 0;
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auto read_set = [&] {
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full_memory_barrier();
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u32 data = m_gmbus_registers->data;
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full_memory_barrier();
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for (size_t index = 0; index < 4; index++) {
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if (nread == length)
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break;
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buf[nread] = (data >> (8 * index)) & 0xFF;
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nread++;
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}
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};
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full_memory_barrier();
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m_gmbus_registers->command = (1 | (address << 1) | (length << 16) | (GMBusCycle::Wait << 25) | (1 << 30));
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full_memory_barrier();
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while (nread < length) {
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if (!wait_for(GMBusStatus::HardwareReady, 250))
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return Error::from_errno(EBUSY);
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read_set();
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}
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if (!wait_for(GMBusStatus::TransactionCompletion, 250))
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return Error::from_errno(EBUSY);
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return {};
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}
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}
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