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Kernel/PCI: Cache interrupt line and interrupt pin of a device
This allows us to remove the PCI::get_interrupt_line API function. As a result, this removes a bunch of not so great patterns that we used to cache PCI interrupt line in many IRQHandler derived classes instead of just using interrupt_number method of IRQHandler class.
This commit is contained in:
parent
057f5a12c2
commit
a411a44fda
17 changed files with 43 additions and 39 deletions
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@ -64,11 +64,6 @@ void disable_interrupt_line(Address address)
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write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | 1 << 10);
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}
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u8 get_interrupt_line(Address address)
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{
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return read8(address, PCI_INTERRUPT_LINE);
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}
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u32 get_BAR0(Address address)
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{
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return read32(address, PCI_BAR0);
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@ -22,7 +22,6 @@ bool is_io_space_enabled(Address);
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void enumerate(Function<void(Address, DeviceIdentifier const&)> callback);
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void enable_interrupt_line(Address);
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void disable_interrupt_line(Address);
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u8 get_interrupt_line(Address);
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void raw_access(Address, u32, size_t, u32);
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u32 get_BAR0(Address);
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u32 get_BAR1(Address);
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@ -388,7 +388,9 @@ UNMAP_AFTER_INIT void Access::enumerate_functions(int type, u8 bus, u8 device, u
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RevisionID revision_id = read8_field(address, PCI_REVISION_ID);
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SubsystemID subsystem_id = read16_field(address, PCI_SUBSYSTEM_ID);
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SubsystemVendorID subsystem_vendor_id = read16_field(address, PCI_SUBSYSTEM_VENDOR_ID);
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m_device_identifiers.append(DeviceIdentifier { address, id, revision_id, class_code, subclass_code, prog_if, subsystem_id, subsystem_vendor_id, get_capabilities(address) });
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InterruptLine interrupt_line = read8_field(address, PCI_INTERRUPT_LINE);
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InterruptPin interrupt_pin = read8_field(address, PCI_INTERRUPT_PIN);
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m_device_identifiers.append(DeviceIdentifier { address, id, revision_id, class_code, subclass_code, prog_if, subsystem_id, subsystem_vendor_id, interrupt_line, interrupt_pin, get_capabilities(address) });
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}
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if (read_type == PCI_TYPE_BRIDGE && recursive && (!m_enumerated_buses.get(read8_field(address, PCI_SECONDARY_BUS)))) {
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@ -36,6 +36,7 @@ namespace Kernel {
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#define PCI_SUBSYSTEM_ID 0x2E // u16
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#define PCI_CAPABILITIES_POINTER 0x34 // u8
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#define PCI_INTERRUPT_LINE 0x3C // byte
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#define PCI_INTERRUPT_PIN 0x3D // byte
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#define PCI_SECONDARY_BUS 0x19 // byte
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#define PCI_HEADER_TYPE_DEVICE 0
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#define PCI_HEADER_TYPE_BRIDGE 1
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@ -187,11 +188,13 @@ TYPEDEF_DISTINCT_ORDERED_ID(u8, ProgrammingInterface);
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TYPEDEF_DISTINCT_ORDERED_ID(u8, RevisionID);
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TYPEDEF_DISTINCT_ORDERED_ID(u16, SubsystemID);
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TYPEDEF_DISTINCT_ORDERED_ID(u16, SubsystemVendorID);
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TYPEDEF_DISTINCT_ORDERED_ID(u8, InterruptLine);
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TYPEDEF_DISTINCT_ORDERED_ID(u8, InterruptPin);
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class Access;
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class DeviceIdentifier {
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public:
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DeviceIdentifier(Address address, HardwareID hardware_id, RevisionID revision_id, ClassCode class_code, SubclassCode subclass_code, ProgrammingInterface prog_if, SubsystemID subsystem_id, SubsystemVendorID subsystem_vendor_id, Vector<Capability> capabilities)
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DeviceIdentifier(Address address, HardwareID hardware_id, RevisionID revision_id, ClassCode class_code, SubclassCode subclass_code, ProgrammingInterface prog_if, SubsystemID subsystem_id, SubsystemVendorID subsystem_vendor_id, InterruptLine interrupt_line, InterruptPin interrupt_pin, Vector<Capability> capabilities)
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: m_address(address)
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, m_hardware_id(hardware_id)
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, m_revision_id(revision_id)
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@ -200,6 +203,8 @@ public:
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, m_prog_if(prog_if)
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, m_subsystem_id(subsystem_id)
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, m_subsystem_vendor_id(subsystem_vendor_id)
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, m_interrupt_line(interrupt_line)
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, m_interrupt_pin(interrupt_pin)
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, m_capabilities(capabilities)
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{
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if constexpr (PCI_DEBUG) {
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@ -219,6 +224,9 @@ public:
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SubsystemID subsystem_id() const { return m_subsystem_id; }
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SubsystemVendorID subsystem_vendor_id() const { return m_subsystem_vendor_id; }
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InterruptLine interrupt_line() const { return m_interrupt_line; }
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InterruptPin interrupt_pin() const { return m_interrupt_pin; }
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void apply_subclass_code_change(Badge<Access>, SubclassCode new_subclass)
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{
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m_subclass_code = new_subclass;
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@ -239,6 +247,9 @@ private:
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SubsystemID m_subsystem_id;
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SubsystemVendorID m_subsystem_vendor_id;
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InterruptLine m_interrupt_line;
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InterruptPin m_interrupt_pin;
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Vector<Capability> m_capabilities;
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};
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