Kernel/PCI: Split host bridge code from the Access singleton

Two classes are added - HostBridge and MemoryBackedHostBridge, which
both derive from HostController class. This allows the kernel to map
different busses from different PCI domains in the same time. Each
HostController implementation doesn't take the Address object to address
PCI devices but instead we take distinct numbers of the PCI bus, device
and function as it allows us to specify arbitrary PCI domains in the
Address structure and still to get the correct PCI devices. This also
matches the hardware behavior of PCI domains - the host bridge merely
takes memory operations or IO operations and translates them to
addressing of three components - PCI bus, device and function.

These changes also greatly simplify how enumeration of Host Bridges work
now - scanning of the hardware depends on what the Host bridges can do
for us, so in case we have multiple host bridges that expose a memory
mapped region or IO ports to access PCI configuration space, we simply
let the code of the host bridge to figure out how to fetch data for us.

Another semantical change is that a PCI domain structure is no longer
attached to a PhysicalAddress, so even in the case that the machine
doesn't implement PCI domains, we still treat that machine to contain 1
PCI domain to treat that one host bridge in the same way, like with a
machine with one or more PCI domains.

Kernel/Bus/PCI/Controller/HostBridge.cpp

@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <Kernel/Arch/x86/IO.h>
+#include <Kernel/Bus/PCI/Access.h>
+#include <Kernel/Bus/PCI/Controller/HostBridge.h>
+#include <Kernel/Sections.h>
+
+namespace Kernel::PCI {
+
+NonnullOwnPtr<HostBridge> HostBridge::must_create_with_io_access()
+{
+    PCI::Domain domain { 0, 0, 0xff };
+    return adopt_own_if_nonnull(new (nothrow) HostBridge(domain)).release_nonnull();
+}
+
+HostBridge::HostBridge(PCI::Domain const& domain)
+    : HostController(domain)
+    , m_enumerated_buses(256, false)
+{
+}
+
+UNMAP_AFTER_INIT Optional<u8> HostBridge::get_capabilities_pointer_for_function(BusNumber bus, DeviceNumber device, FunctionNumber function)
+{
+    if (read16_field(bus, device, function, PCI::RegisterOffset::STATUS) & (1 << 4)) {
+        return read8_field(bus, device, function, PCI::RegisterOffset::CAPABILITIES_POINTER);
+    }
+    return {};
+}
+
+UNMAP_AFTER_INIT Vector<Capability> HostBridge::get_capabilities_for_function(BusNumber bus, DeviceNumber device, FunctionNumber function)
+{
+    auto capabilities_pointer = get_capabilities_pointer_for_function(bus, device, function);
+    if (!capabilities_pointer.has_value()) {
+        return {};
+    }
+    Vector<Capability> capabilities;
+    auto capability_pointer = capabilities_pointer.value();
+    while (capability_pointer != 0) {
+        u16 capability_header = read16_field(bus, device, function, capability_pointer);
+        u8 capability_id = capability_header & 0xff;
+
+        // FIXME: Don't attach a PCI address to a capability object
+        capabilities.append({ Address(domain_number(), bus.value(), device.value(), function.value()), capability_id, capability_pointer });
+        capability_pointer = capability_header >> 8;
+    }
+    return capabilities;
+}
+
+UNMAP_AFTER_INIT void HostBridge::enumerate_functions(Function<void(DeviceIdentifier)> const& callback, BusNumber bus, DeviceNumber device, FunctionNumber function, bool recursive_search_into_bridges)
+{
+    dbgln_if(PCI_DEBUG, "PCI: Enumerating function, bus={}, device={}, function={}", bus, device, function);
+    Address address(0, bus.value(), device.value(), function.value());
+    auto pci_class = (read8_field(bus, device, function, PCI::RegisterOffset::CLASS) << 8u) | read8_field(bus, device, function, PCI::RegisterOffset::SUBCLASS);
+
+    HardwareID id = { read16_field(bus, device, function, PCI::RegisterOffset::VENDOR_ID), read16_field(bus, device, function, PCI::RegisterOffset::DEVICE_ID) };
+    ClassCode class_code = read8_field(bus, device, function, PCI::RegisterOffset::CLASS);
+    SubclassCode subclass_code = read8_field(bus, device, function, PCI::RegisterOffset::SUBCLASS);
+    ProgrammingInterface prog_if = read8_field(bus, device, function, PCI::RegisterOffset::PROG_IF);
+    RevisionID revision_id = read8_field(bus, device, function, PCI::RegisterOffset::REVISION_ID);
+    SubsystemID subsystem_id = read16_field(bus, device, function, PCI::RegisterOffset::SUBSYSTEM_ID);
+    SubsystemVendorID subsystem_vendor_id = read16_field(bus, device, function, PCI::RegisterOffset::SUBSYSTEM_VENDOR_ID);
+    InterruptLine interrupt_line = read8_field(bus, device, function, PCI::RegisterOffset::INTERRUPT_LINE);
+    InterruptPin interrupt_pin = read8_field(bus, device, function, PCI::RegisterOffset::INTERRUPT_PIN);
+    auto capabilities = get_capabilities_for_function(bus, device, function);
+    callback(DeviceIdentifier { address, id, revision_id, class_code, subclass_code, prog_if, subsystem_id, subsystem_vendor_id, interrupt_line, interrupt_pin, capabilities });
+
+    if (pci_class == (to_underlying(PCI::ClassID::Bridge) << 8 | to_underlying(PCI::Bridge::SubclassID::PCI_TO_PCI))
+        && recursive_search_into_bridges
+        && (!m_enumerated_buses.get(read8_field(bus, device, function, PCI::RegisterOffset::SECONDARY_BUS)))) {
+        u8 secondary_bus = read8_field(bus, device, function, PCI::RegisterOffset::SECONDARY_BUS);
+        dbgln_if(PCI_DEBUG, "PCI: Found secondary bus: {}", secondary_bus);
+        VERIFY(secondary_bus != bus);
+        m_enumerated_buses.set(secondary_bus, true);
+        enumerate_bus(callback, secondary_bus, recursive_search_into_bridges);
+    }
+}
+
+UNMAP_AFTER_INIT void HostBridge::enumerate_device(Function<void(DeviceIdentifier)> const& callback, BusNumber bus, DeviceNumber device, bool recursive_search_into_bridges)
+{
+    dbgln_if(PCI_DEBUG, "PCI: Enumerating device in bus={}, device={}", bus, device);
+    if (read16_field(bus, device, 0, PCI::RegisterOffset::VENDOR_ID) == PCI::none_value)
+        return;
+    enumerate_functions(callback, bus, device, 0, recursive_search_into_bridges);
+    if (!(read8_field(bus, device, 0, PCI::RegisterOffset::HEADER_TYPE) & 0x80))
+        return;
+    for (u8 function = 1; function < 8; ++function) {
+        if (read16_field(bus, device, function, PCI::RegisterOffset::VENDOR_ID) != PCI::none_value)
+            enumerate_functions(callback, bus, device, function, recursive_search_into_bridges);
+    }
+}
+
+UNMAP_AFTER_INIT void HostBridge::enumerate_bus(Function<void(DeviceIdentifier)> const& callback, BusNumber bus, bool recursive_search_into_bridges)
+{
+    dbgln_if(PCI_DEBUG, "PCI: Enumerating bus {}", bus);
+    for (u8 device = 0; device < 32; ++device)
+        enumerate_device(callback, bus, device, recursive_search_into_bridges);
+}
+
+UNMAP_AFTER_INIT void HostBridge::enumerate_attached_devices(Function<void(DeviceIdentifier)> callback)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    VERIFY(Access::the().scan_lock().is_locked());
+    // First scan bus 0. Find any device on that bus, and if it's a PCI-to-PCI
+    // bridge, recursively scan it too.
+    m_enumerated_buses.set(0, true);
+    enumerate_bus(callback, 0, true);
+
+    // Handle Multiple PCI host bridges on slot 0, device 0.
+    // If we happen to miss some PCI buses because they are not reachable through
+    // recursive PCI-to-PCI bridges starting from bus 0, we might find them here.
+    if ((read8_field(0, 0, 0, PCI::RegisterOffset::HEADER_TYPE) & 0x80) != 0) {
+        for (int bus_as_function_number = 1; bus_as_function_number < 256; ++bus_as_function_number) {
+            if (read16_field(0, 0, bus_as_function_number, PCI::RegisterOffset::VENDOR_ID) == PCI::none_value)
+                continue;
+            if (read16_field(0, 0, bus_as_function_number, PCI::RegisterOffset::CLASS) != 0x6)
+                continue;
+            if (m_enumerated_buses.get(bus_as_function_number))
+                continue;
+            enumerate_bus(callback, bus_as_function_number, false);
+            m_enumerated_buses.set(bus_as_function_number, true);
+        }
+    }
+}
+
+static u32 io_address_for_pci_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u8 field)
+{
+    return 0x80000000u | (bus.value() << 16u) | (device.value() << 11u) | (function.value() << 8u) | (field & 0xfc);
+}
+
+void HostBridge::write8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u8 value)
+{
+    IO::out32(PCI::address_port, io_address_for_pci_field(bus, device, function, field));
+    IO::out8(PCI::value_port + (field & 3), value);
+}
+void HostBridge::write16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u16 value)
+{
+    IO::out32(PCI::address_port, io_address_for_pci_field(bus, device, function, field));
+    IO::out16(PCI::value_port + (field & 2), value);
+}
+void HostBridge::write32_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u32 value)
+{
+    IO::out32(PCI::address_port, io_address_for_pci_field(bus, device, function, field));
+    IO::out32(PCI::value_port, value);
+}
+
+u8 HostBridge::read8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
+{
+    IO::out32(PCI::address_port, io_address_for_pci_field(bus, device, function, field));
+    return IO::in8(PCI::value_port + (field & 3));
+}
+u16 HostBridge::read16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
+{
+    IO::out32(PCI::address_port, io_address_for_pci_field(bus, device, function, field));
+    return IO::in16(PCI::value_port + (field & 2));
+}
+u32 HostBridge::read32_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
+{
+    IO::out32(PCI::address_port, io_address_for_pci_field(bus, device, function, field));
+    return IO::in32(PCI::value_port);
+}
+
+u8 HostBridge::read8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, PCI::RegisterOffset field)
+{
+    return read8_field(bus, device, function, to_underlying(field));
+}
+u16 HostBridge::read16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, PCI::RegisterOffset field)
+{
+    return read16_field(bus, device, function, to_underlying(field));
+}
+
+}

Kernel/Bus/PCI/Controller/HostBridge.h

@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#pragma once
+
+#include <AK/Bitmap.h>
+#include <AK/NonnullOwnPtr.h>
+#include <AK/OwnPtr.h>
+#include <AK/Vector.h>
+#include <Kernel/Bus/PCI/Controller/HostController.h>
+#include <Kernel/Locking/Spinlock.h>
+
+namespace Kernel::PCI {
+
+class HostBridge : public HostController {
+public:
+    static NonnullOwnPtr<HostBridge> must_create_with_io_access();
+
+    virtual void write8_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u8 value) override;
+    virtual void write16_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u16 value) override;
+    virtual void write32_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u32 value) override;
+
+    virtual u8 read8_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) override;
+    virtual u16 read16_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) override;
+    virtual u32 read32_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) override;
+
+protected:
+    explicit HostBridge(PCI::Domain const&);
+
+private:
+    virtual void enumerate_attached_devices(Function<void(DeviceIdentifier)> callback) override;
+
+    Bitmap m_enumerated_buses;
+
+    u8 read8_field(BusNumber, DeviceNumber, FunctionNumber, RegisterOffset field);
+    u16 read16_field(BusNumber, DeviceNumber, FunctionNumber, RegisterOffset field);
+
+    Optional<u8> get_capabilities_pointer_for_function(BusNumber, DeviceNumber, FunctionNumber);
+    Vector<Capability> get_capabilities_for_function(BusNumber, DeviceNumber, FunctionNumber);
+
+    void enumerate_bus(Function<void(DeviceIdentifier)> const& callback, BusNumber, bool recursive);
+    void enumerate_functions(Function<void(DeviceIdentifier)> const& callback, BusNumber, DeviceNumber, FunctionNumber, bool recursive);
+    void enumerate_device(Function<void(DeviceIdentifier)> const& callback, BusNumber bus, DeviceNumber device, bool recursive);
+};
+
+}

Kernel/Bus/PCI/Controller/HostController.h

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#pragma once
+
+#include <AK/Bitmap.h>
+#include <AK/Vector.h>
+#include <Kernel/Bus/PCI/Definitions.h>
+#include <Kernel/Locking/Spinlock.h>
+
+namespace Kernel::PCI {
+
+TYPEDEF_DISTINCT_ORDERED_ID(u8, BusNumber);
+TYPEDEF_DISTINCT_ORDERED_ID(u8, DeviceNumber);
+TYPEDEF_DISTINCT_ORDERED_ID(u8, FunctionNumber);
+
+class HostController {
+public:
+    virtual ~HostController() = default;
+
+    virtual void write8_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u8 value) = 0;
+    virtual void write16_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u16 value) = 0;
+    virtual void write32_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u32 value) = 0;
+
+    virtual u8 read8_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) = 0;
+    virtual u16 read16_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) = 0;
+    virtual u32 read32_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) = 0;
+
+    u32 domain_number() const { return m_domain.domain_number(); }
+
+    virtual void enumerate_attached_devices(Function<void(DeviceIdentifier)> callback) = 0;
+
+protected:
+    explicit HostController(PCI::Domain const& domain)
+        : m_domain(domain)
+    {
+    }
+
+    const PCI::Domain m_domain;
+};
+
+}

Kernel/Bus/PCI/Controller/MemoryBackedHostBridge.cpp

@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <AK/ByteReader.h>
+#include <Kernel/Arch/x86/IO.h>
+#include <Kernel/Bus/PCI/Access.h>
+#include <Kernel/Bus/PCI/Controller/MemoryBackedHostBridge.h>
+
+namespace Kernel::PCI {
+
+NonnullOwnPtr<MemoryBackedHostBridge> MemoryBackedHostBridge::must_create(Domain const& domain, PhysicalAddress start_address)
+{
+    return adopt_own_if_nonnull(new (nothrow) MemoryBackedHostBridge(domain, start_address)).release_nonnull();
+}
+
+MemoryBackedHostBridge::MemoryBackedHostBridge(PCI::Domain const& domain, PhysicalAddress start_address)
+    : HostBridge(domain)
+    , m_start_address(start_address)
+{
+}
+
+u8 MemoryBackedHostBridge::read8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    VERIFY(field <= 0xfff);
+    return *((volatile u8*)(get_device_configuration_memory_mapped_space(bus, device, function).get() + (field & 0xfff)));
+}
+u16 MemoryBackedHostBridge::read16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    VERIFY(field < 0xfff);
+    u16 data = 0;
+    ByteReader::load<u16>(get_device_configuration_memory_mapped_space(bus, device, function).offset(field & 0xfff).as_ptr(), data);
+    return data;
+}
+u32 MemoryBackedHostBridge::read32_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    VERIFY(field <= 0xffc);
+    u32 data = 0;
+    ByteReader::load<u32>(get_device_configuration_memory_mapped_space(bus, device, function).offset(field & 0xfff).as_ptr(), data);
+    return data;
+}
+void MemoryBackedHostBridge::write8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u8 value)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    VERIFY(field <= 0xfff);
+    *((volatile u8*)(get_device_configuration_memory_mapped_space(bus, device, function).get() + (field & 0xfff))) = value;
+}
+void MemoryBackedHostBridge::write16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u16 value)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    VERIFY(field < 0xfff);
+    ByteReader::store<u16>(get_device_configuration_memory_mapped_space(bus, device, function).offset(field & 0xfff).as_ptr(), value);
+}
+void MemoryBackedHostBridge::write32_field(BusNumber bus, DeviceNumber device, FunctionNumber function, u32 field, u32 value)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    VERIFY(field <= 0xffc);
+    ByteReader::store<u32>(get_device_configuration_memory_mapped_space(bus, device, function).offset(field & 0xfff).as_ptr(), value);
+}
+
+void MemoryBackedHostBridge::map_bus_region(BusNumber bus)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    if (m_mapped_bus == bus && m_mapped_bus_region)
+        return;
+    auto bus_base_address = determine_memory_mapped_bus_base_address(bus);
+    auto region_or_error = MM.allocate_kernel_region(bus_base_address, memory_range_per_bus, "PCI ECAM", Memory::Region::Access::ReadWrite);
+    // FIXME: Find a way to propagate error from here.
+    if (region_or_error.is_error())
+        VERIFY_NOT_REACHED();
+    m_mapped_bus_region = region_or_error.release_value();
+    m_mapped_bus = bus;
+    dbgln_if(PCI_DEBUG, "PCI: New PCI ECAM Mapped region for bus {} @ {} {}", bus, m_mapped_bus_region->vaddr(), m_mapped_bus_region->physical_page(0)->paddr());
+}
+
+VirtualAddress MemoryBackedHostBridge::get_device_configuration_memory_mapped_space(BusNumber bus, DeviceNumber device, FunctionNumber function)
+{
+    VERIFY(Access::the().access_lock().is_locked());
+    map_bus_region(bus);
+    return m_mapped_bus_region->vaddr().offset(mmio_device_space_size * function.value() + (mmio_device_space_size * to_underlying(Limits::MaxFunctionsPerDevice)) * device.value());
+}
+
+PhysicalAddress MemoryBackedHostBridge::determine_memory_mapped_bus_base_address(BusNumber bus) const
+{
+    auto start_bus = min(bus.value(), m_domain.start_bus());
+    return m_start_address.offset(memory_range_per_bus * (bus.value() - start_bus));
+}
+
+}

Kernel/Bus/PCI/Controller/MemoryBackedHostBridge.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#pragma once
+
+#include <AK/Bitmap.h>
+#include <AK/Vector.h>
+#include <Kernel/Bus/PCI/Controller/HostBridge.h>
+#include <Kernel/Locking/Spinlock.h>
+
+namespace Kernel::PCI {
+
+class MemoryBackedHostBridge final : public HostBridge {
+public:
+    static NonnullOwnPtr<MemoryBackedHostBridge> must_create(Domain const&, PhysicalAddress);
+
+    virtual void write8_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u8 value) override;
+    virtual void write16_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u16 value) override;
+    virtual void write32_field(BusNumber, DeviceNumber, FunctionNumber, u32 field, u32 value) override;
+
+    virtual u8 read8_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) override;
+    virtual u16 read16_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) override;
+    virtual u32 read32_field(BusNumber, DeviceNumber, FunctionNumber, u32 field) override;
+
+private:
+    MemoryBackedHostBridge(PCI::Domain const&, PhysicalAddress);
+
+    // Memory-mapped access operations
+    void map_bus_region(BusNumber);
+    VirtualAddress get_device_configuration_memory_mapped_space(BusNumber, DeviceNumber, FunctionNumber);
+    PhysicalAddress determine_memory_mapped_bus_base_address(BusNumber) const;
+
+    // Data-members for accessing Memory mapped PCI devices' configuration spaces
+    BusNumber m_mapped_bus { 0 };
+    OwnPtr<Memory::Region> m_mapped_bus_region;
+    PhysicalAddress m_start_address;
+};
+
+}