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Kernel: Allow switching to IOAPIC mode even without enabling SMP
This small change allows to use the IOAPIC by default without to enable SMP mode, which emulates Uni-Processor setup with IOAPIC instead of using the PIC. This opens the opportunity to utilize other types of interrupts like MSI and MSI-X interrupts.
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parent
f57900a41b
commit
ac7953f945
5 changed files with 41 additions and 29 deletions
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@ -111,6 +111,16 @@ UNMAP_AFTER_INIT bool CommandLine::is_smp_enabled() const
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return lookup("smp"sv).value_or("off"sv) == "on"sv;
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}
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UNMAP_AFTER_INIT bool CommandLine::is_ioapic_enabled() const
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{
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auto value = lookup("enable_ioapic"sv).value_or("on"sv);
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if (value == "on"sv)
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return true;
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if (value == "off"sv)
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return false;
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PANIC("Unknown enable_ioapic setting: {}", value);
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}
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UNMAP_AFTER_INIT bool CommandLine::is_vmmouse_enabled() const
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{
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return lookup("vmmouse"sv).value_or("on"sv) == "on"sv;
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@ -59,6 +59,7 @@ public:
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[[nodiscard]] bool is_boot_profiling_enabled() const;
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[[nodiscard]] bool is_ide_enabled() const;
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[[nodiscard]] bool is_ioapic_enabled() const;
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[[nodiscard]] bool is_smp_enabled() const;
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[[nodiscard]] bool is_physical_networking_disabled() const;
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[[nodiscard]] bool is_vmmouse_enabled() const;
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@ -270,6 +270,7 @@ UNMAP_AFTER_INIT bool APIC::init_bsp()
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return false;
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}
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if (kernel_command_line().is_smp_enabled()) {
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auto madt = Memory::map_typed<ACPI::Structures::MADT>(madt_address.value());
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size_t entry_index = 0;
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size_t entries_length = madt->h.length - sizeof(ACPI::Structures::MADT);
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@ -294,14 +295,14 @@ UNMAP_AFTER_INIT bool APIC::init_bsp()
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entries_length -= entry_length;
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entry_index++;
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}
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dbgln("APIC processors found: {}, enabled: {}", m_processor_cnt, m_processor_enabled_cnt);
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}
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if (m_processor_enabled_cnt < 1)
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m_processor_enabled_cnt = 1;
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if (m_processor_cnt < 1)
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m_processor_cnt = 1;
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dbgln("APIC processors found: {}, enabled: {}", m_processor_cnt, m_processor_enabled_cnt);
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enable(0);
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return true;
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}
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@ -41,10 +41,10 @@ UNMAP_AFTER_INIT void InterruptManagement::initialize()
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VERIFY(!InterruptManagement::initialized());
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s_interrupt_management = new InterruptManagement();
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if (kernel_command_line().is_smp_enabled())
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InterruptManagement::the().switch_to_ioapic_mode();
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else
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if (!kernel_command_line().is_ioapic_enabled() && !kernel_command_line().is_smp_enabled())
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InterruptManagement::the().switch_to_pic_mode();
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else
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InterruptManagement::the().switch_to_ioapic_mode();
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}
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void InterruptManagement::enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)> callback)
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@ -220,7 +220,7 @@ UNMAP_AFTER_INIT void InterruptManagement::locate_apic_data()
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dbgln("Interrupts: Overriding INT {:#x} with GSI {}, for bus {:#x}",
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interrupt_override_entry->source,
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global_system_interrupt,
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flags);
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interrupt_override_entry->bus);
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}
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madt_entry = (ACPI::Structures::MADTEntryHeader*)(VirtualAddress(madt_entry).offset(entry_length).get());
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entries_length -= entry_length;
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@ -271,7 +271,7 @@ void init_stage2(void*)
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WorkQueue::initialize();
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if (APIC::initialized() && APIC::the().enabled_processor_count() > 1) {
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if (kernel_command_line().is_smp_enabled() && APIC::initialized() && APIC::the().enabled_processor_count() > 1) {
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// We can't start the APs until we have a scheduler up and running.
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// We need to be able to process ICI messages, otherwise another
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// core may send too many and end up deadlocking once the pool is
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