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Kernel: Use PAE to allow accessing all physical memory beyond 4GB

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We already use PAE for the NX bit, but this changes the PhysicalAddress
structure to be able to hold 64 bit physical addresses. This allows us
to use all the available physical memory.
This commit is contained in:
Tom 2021-07-06 21:35:15 -06:00 • committed by Andreas Kling
parent 658b41a06c
commit ad5d9d648b
7 changed files with 87 additions and 86 deletions
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14
Kernel/Arch/x86/PageDirectory.h
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@ -8,6 +8,7 @@
#include <AK/Badge.h>
#include <AK/Types.h>
#include <Kernel/PhysicalAddress.h>
namespace Kernel {
@ -16,12 +17,11 @@ class PageTableEntry;
class PageDirectoryEntry {
public:
const PageTableEntry* page_table_base() const { return reinterpret_cast<PageTableEntry*>(m_raw & 0xfffff000u); }
PageTableEntry* page_table_base() { return reinterpret_cast<PageTableEntry*>(m_raw & 0xfffff000u); }
PhysicalPtr page_table_base() const { return PhysicalAddress::physical_page_base(m_raw); }
void set_page_table_base(u32 value)
{
m_raw &= 0x8000000000000fffULL;
m_raw |= value & 0xfffff000;
m_raw |= PhysicalAddress::physical_page_base(value);
}
bool is_null() const { return m_raw == 0; }
@ -79,11 +79,11 @@ private:
class PageTableEntry {
public:
void* physical_page_base() { return reinterpret_cast<void*>(m_raw & 0xfffff000u); }
void set_physical_page_base(u32 value)
PhysicalPtr physical_page_base() { return PhysicalAddress::physical_page_base(m_raw); }
void set_physical_page_base(PhysicalPtr value)
{
m_raw &= 0x8000000000000fffULL;
m_raw |= value & 0xfffff000;
m_raw |= PhysicalAddress::physical_page_base(value);
}
u64 raw() const { return (u32)m_raw; }
@ -141,7 +141,7 @@ class PageDirectoryPointerTable {
public:
PageDirectoryEntry* directory(size_t index)
{
return (PageDirectoryEntry*)(raw[index] & ~0xfffu);
return (PageDirectoryEntry*)(PhysicalAddress::physical_page_base(raw[index]));
}
u64 raw[4];