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https://github.com/RGBCube/serenity
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UserspaceEmulator: Implement the SBB family of instructions
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734f63d522
commit
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1 changed files with 32 additions and 14 deletions
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@ -335,6 +335,37 @@ static T op_sub(SoftCPU& cpu, const T& dest, const T& src)
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return result;
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}
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template<typename T>
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static T op_sbb(SoftCPU& cpu, const T& dest, const T& src)
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{
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T result = 0;
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u32 new_flags = 0;
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if constexpr (sizeof(T) == 4) {
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asm volatile("sbbl %%ecx, %%eax\n"
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: "=a"(result)
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: "a"(dest), "c"((u32)src));
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} else if constexpr (sizeof(T) == 2) {
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asm volatile("sbbw %%cx, %%ax\n"
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: "=a"(result)
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: "a"(dest), "c"((u16)src));
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} else if constexpr (sizeof(T) == 1) {
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asm volatile("sbbb %%cl, %%al\n"
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: "=a"(result)
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: "a"(dest), "c"((u8)src));
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} else {
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ASSERT_NOT_REACHED();
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}
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asm volatile(
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"pushf\n"
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"pop %%ebx"
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: "=b"(new_flags));
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cpu.set_flags_oszapc(new_flags);
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return result;
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}
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template<typename T>
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static T op_add(SoftCPU& cpu, T& dest, const T& src)
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{
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@ -1226,20 +1257,6 @@ void SoftCPU::SAR_RM8_imm8(const X86::Instruction& insn)
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insn.modrm().write8(*this, insn, op_sar(*this, data, insn.imm8()));
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}
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void SoftCPU::SBB_AL_imm8(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_AX_imm16(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_EAX_imm32(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM16_imm16(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM16_imm8(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM16_reg16(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM32_imm32(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM32_imm8(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM32_reg32(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM8_imm8(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_RM8_reg8(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_reg16_RM16(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_reg32_RM32(const X86::Instruction&) { TODO(); }
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void SoftCPU::SBB_reg8_RM8(const X86::Instruction&) { TODO(); }
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void SoftCPU::SCASB(const X86::Instruction&) { TODO(); }
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void SoftCPU::SCASD(const X86::Instruction&) { TODO(); }
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void SoftCPU::SCASW(const X86::Instruction&) { TODO(); }
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@ -1461,6 +1478,7 @@ DEFINE_GENERIC_INSN_HANDLERS(XOR, op_xor, true)
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DEFINE_GENERIC_INSN_HANDLERS(OR, op_or, true)
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DEFINE_GENERIC_INSN_HANDLERS(ADD, op_add, true)
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DEFINE_GENERIC_INSN_HANDLERS(SUB, op_sub, true)
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DEFINE_GENERIC_INSN_HANDLERS(SBB, op_sbb, true)
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DEFINE_GENERIC_INSN_HANDLERS(AND, op_and, true)
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DEFINE_GENERIC_INSN_HANDLERS(CMP, op_sub, false)
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DEFINE_GENERIC_INSN_HANDLERS_PARTIAL(TEST, op_and, false)
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