mirror of
https://github.com/RGBCube/serenity
synced 2025-05-24 01:05:08 +00:00
Yet more coding style fixes.
This commit is contained in:
Andreas Kling
parent
f31e1ceab0
commit
aff89d2fd7
18 changed files with 197 additions and 199 deletions
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@ -21,12 +21,12 @@ MemoryManager& MM
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MemoryManager::MemoryManager()
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{
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m_kernel_page_directory = (PageDirectory*)0x4000;
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m_pageTableZero = (dword*)0x6000;
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m_pageTableOne = (dword*)0x7000;
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m_page_table_zero = (dword*)0x6000;
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m_page_table_one = (dword*)0x7000;
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m_next_laddr.set(0xd0000000);
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initializePaging();
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initialize_paging();
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}
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MemoryManager::~MemoryManager()
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@ -60,12 +60,12 @@ void MemoryManager::release_page_directory(PageDirectory& page_directory)
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#endif
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}
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void MemoryManager::initializePaging()
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void MemoryManager::initialize_paging()
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{
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static_assert(sizeof(MemoryManager::PageDirectoryEntry) == 4);
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static_assert(sizeof(MemoryManager::PageTableEntry) == 4);
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memset(m_pageTableZero, 0, PAGE_SIZE);
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memset(m_pageTableOne, 0, PAGE_SIZE);
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memset(m_page_table_zero, 0, PAGE_SIZE);
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memset(m_page_table_one, 0, PAGE_SIZE);
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memset(m_kernel_page_directory, 0, sizeof(PageDirectory));
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#ifdef MM_DEBUG
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@ -73,7 +73,7 @@ void MemoryManager::initializePaging()
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#endif
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// Make null dereferences crash.
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protectMap(LinearAddress(0), PAGE_SIZE);
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map_protected(LinearAddress(0), PAGE_SIZE);
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// The bottom 4 MB are identity mapped & supervisor only. Every process shares these mappings.
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create_identity_mapping(LinearAddress(PAGE_SIZE), 4 * MB);
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@ -123,38 +123,38 @@ void MemoryManager::remove_identity_mapping(LinearAddress laddr, size_t size)
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// FIXME: ASSERT(laddr is 4KB aligned);
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for (dword offset = 0; offset < size; offset += PAGE_SIZE) {
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auto pte_address = laddr.offset(offset);
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auto pte = ensurePTE(m_kernel_page_directory, pte_address);
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pte.setPhysicalPageBase(0);
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pte.setUserAllowed(false);
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pte.setPresent(true);
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pte.setWritable(true);
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flushTLB(pte_address);
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auto pte = ensure_pte(m_kernel_page_directory, pte_address);
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pte.set_physical_page_base(0);
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pte.set_user_allowed(false);
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pte.set_present(true);
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pte.set_writable(true);
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flush_tlb(pte_address);
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}
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}
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auto MemoryManager::ensurePTE(PageDirectory* page_directory, LinearAddress laddr) -> PageTableEntry
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auto MemoryManager::ensure_pte(PageDirectory* page_directory, LinearAddress laddr) -> PageTableEntry
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{
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ASSERT_INTERRUPTS_DISABLED();
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dword page_directory_index = (laddr.get() >> 22) & 0x3ff;
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dword page_table_index = (laddr.get() >> 12) & 0x3ff;
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PageDirectoryEntry pde = PageDirectoryEntry(&page_directory->entries[page_directory_index]);
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if (!pde.isPresent()) {
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if (!pde.is_present()) {
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#ifdef MM_DEBUG
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dbgprintf("MM: PDE %u not present, allocating\n", page_directory_index);
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#endif
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if (page_directory_index == 0) {
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ASSERT(page_directory == m_kernel_page_directory);
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pde.setPageTableBase((dword)m_pageTableZero);
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pde.setUserAllowed(false);
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pde.setPresent(true);
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pde.setWritable(true);
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pde.setPageTableBase((dword)m_page_table_zero);
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pde.set_user_allowed(false);
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pde.set_present(true);
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pde.set_writable(true);
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} else if (page_directory_index == 1) {
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ASSERT(page_directory == m_kernel_page_directory);
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pde.setPageTableBase((dword)m_pageTableOne);
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pde.setUserAllowed(false);
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pde.setPresent(true);
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pde.setWritable(true);
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pde.setPageTableBase((dword)m_page_table_one);
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pde.set_user_allowed(false);
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pde.set_present(true);
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pde.set_writable(true);
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} else {
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auto page_table = allocate_page_table(*page_directory, page_directory_index);
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#ifdef MM_DEBUG
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@ -167,27 +167,27 @@ auto MemoryManager::ensurePTE(PageDirectory* page_directory, LinearAddress laddr
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#endif
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pde.setPageTableBase(page_table->paddr().get());
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pde.setUserAllowed(true);
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pde.setPresent(true);
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pde.setWritable(true);
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pde.set_user_allowed(true);
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pde.set_present(true);
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pde.set_writable(true);
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page_directory->physical_pages[page_directory_index] = move(page_table);
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}
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}
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return PageTableEntry(&pde.pageTableBase()[page_table_index]);
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}
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void MemoryManager::protectMap(LinearAddress linearAddress, size_t length)
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void MemoryManager::map_protected(LinearAddress linearAddress, size_t length)
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{
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InterruptDisabler disabler;
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// FIXME: ASSERT(linearAddress is 4KB aligned);
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for (dword offset = 0; offset < length; offset += PAGE_SIZE) {
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auto pteAddress = linearAddress.offset(offset);
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auto pte = ensurePTE(m_kernel_page_directory, pteAddress);
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pte.setPhysicalPageBase(pteAddress.get());
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pte.setUserAllowed(false);
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pte.setPresent(false);
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pte.setWritable(false);
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flushTLB(pteAddress);
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auto pte = ensure_pte(m_kernel_page_directory, pteAddress);
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pte.set_physical_page_base(pteAddress.get());
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pte.set_user_allowed(false);
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pte.set_present(false);
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pte.set_writable(false);
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flush_tlb(pteAddress);
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}
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}
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@ -197,12 +197,12 @@ void MemoryManager::create_identity_mapping(LinearAddress laddr, size_t size)
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// FIXME: ASSERT(laddr is 4KB aligned);
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for (dword offset = 0; offset < size; offset += PAGE_SIZE) {
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auto pteAddress = laddr.offset(offset);
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auto pte = ensurePTE(m_kernel_page_directory, pteAddress);
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pte.setPhysicalPageBase(pteAddress.get());
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pte.setUserAllowed(false);
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pte.setPresent(true);
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pte.setWritable(true);
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flushTLB(pteAddress);
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auto pte = ensure_pte(m_kernel_page_directory, pteAddress);
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pte.set_physical_page_base(pteAddress.get());
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pte.set_user_allowed(false);
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pte.set_present(true);
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pte.set_writable(true);
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flush_tlb(pteAddress);
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}
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}
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@ -389,7 +389,7 @@ void MemoryManager::enter_process_paging_scope(Process& process)
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asm volatile("movl %%eax, %%cr3"::"a"(process.m_page_directory):"memory");
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}
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void MemoryManager::flushEntireTLB()
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void MemoryManager::flush_entire_tlb()
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{
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asm volatile(
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"mov %cr3, %eax\n"
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@ -397,7 +397,7 @@ void MemoryManager::flushEntireTLB()
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);
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}
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void MemoryManager::flushTLB(LinearAddress laddr)
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void MemoryManager::flush_tlb(LinearAddress laddr)
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{
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asm volatile("invlpg %0": :"m" (*(char*)laddr.get()) : "memory");
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}
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@ -406,12 +406,12 @@ byte* MemoryManager::quickmap_page(PhysicalPage& physical_page)
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{
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ASSERT_INTERRUPTS_DISABLED();
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auto page_laddr = LinearAddress(4 * MB);
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auto pte = ensurePTE(m_kernel_page_directory, page_laddr);
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pte.setPhysicalPageBase(physical_page.paddr().get());
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pte.setPresent(true); // FIXME: Maybe we should use the is_readable flag here?
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pte.setWritable(true);
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pte.setUserAllowed(false);
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flushTLB(page_laddr);
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auto pte = ensure_pte(m_kernel_page_directory, page_laddr);
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pte.set_physical_page_base(physical_page.paddr().get());
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pte.set_present(true); // FIXME: Maybe we should use the is_readable flag here?
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pte.set_writable(true);
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pte.set_user_allowed(false);
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flush_tlb(page_laddr);
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#ifdef MM_DEBUG
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dbgprintf("MM: >> quickmap_page L%x => P%x\n", page_laddr, physical_page.paddr().get());
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#endif
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@ -422,15 +422,15 @@ void MemoryManager::unquickmap_page()
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{
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ASSERT_INTERRUPTS_DISABLED();
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auto page_laddr = LinearAddress(4 * MB);
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auto pte = ensurePTE(m_kernel_page_directory, page_laddr);
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auto pte = ensure_pte(m_kernel_page_directory, page_laddr);
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#ifdef MM_DEBUG
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auto old_physical_address = pte.physicalPageBase();
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#endif
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pte.setPhysicalPageBase(0);
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pte.setPresent(false);
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pte.setWritable(false);
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pte.setUserAllowed(false);
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flushTLB(page_laddr);
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pte.set_physical_page_base(0);
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pte.set_present(false);
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pte.set_writable(false);
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pte.set_user_allowed(false);
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flush_tlb(page_laddr);
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#ifdef MM_DEBUG
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dbgprintf("MM: >> unquickmap_page L%x =/> P%x\n", page_laddr, old_physical_address);
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#endif
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@ -440,18 +440,18 @@ void MemoryManager::remap_region_page(PageDirectory* page_directory, Region& reg
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{
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InterruptDisabler disabler;
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auto page_laddr = region.linearAddress.offset(page_index_in_region * PAGE_SIZE);
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auto pte = ensurePTE(page_directory, page_laddr);
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auto pte = ensure_pte(page_directory, page_laddr);
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auto& physical_page = region.vmo().physical_pages()[page_index_in_region];
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ASSERT(physical_page);
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pte.setPhysicalPageBase(physical_page->paddr().get());
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pte.setPresent(true); // FIXME: Maybe we should use the is_readable flag here?
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pte.set_physical_page_base(physical_page->paddr().get());
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pte.set_present(true); // FIXME: Maybe we should use the is_readable flag here?
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if (region.cow_map.get(page_index_in_region))
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pte.setWritable(false);
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pte.set_writable(false);
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else
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pte.setWritable(region.is_writable);
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pte.setUserAllowed(user_allowed);
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pte.set_writable(region.is_writable);
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pte.set_user_allowed(user_allowed);
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if (page_directory->is_active())
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flushTLB(page_laddr);
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flush_tlb(page_laddr);
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#ifdef MM_DEBUG
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dbgprintf("MM: >> remap_region_page (PD=%x) '%s' L%x => P%x (@%p)\n", page_directory, region.name.characters(), page_laddr.get(), physical_page->paddr().get(), physical_page.ptr());
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#endif
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@ -472,23 +472,23 @@ void MemoryManager::map_region_at_address(PageDirectory* page_directory, Region&
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#endif
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for (size_t i = region.first_page_index(); i <= region.last_page_index(); ++i) {
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auto page_laddr = laddr.offset(i * PAGE_SIZE);
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auto pte = ensurePTE(page_directory, page_laddr);
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auto pte = ensure_pte(page_directory, page_laddr);
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auto& physical_page = vmo.physical_pages()[i];
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if (physical_page) {
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pte.setPhysicalPageBase(physical_page->paddr().get());
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pte.setPresent(true); // FIXME: Maybe we should use the is_readable flag here?
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pte.set_physical_page_base(physical_page->paddr().get());
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pte.set_present(true); // FIXME: Maybe we should use the is_readable flag here?
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if (region.cow_map.get(i))
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pte.setWritable(false);
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pte.set_writable(false);
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else
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pte.setWritable(region.is_writable);
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pte.set_writable(region.is_writable);
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} else {
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pte.setPhysicalPageBase(0);
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pte.setPresent(false);
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pte.setWritable(region.is_writable);
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pte.set_physical_page_base(0);
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pte.set_present(false);
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pte.set_writable(region.is_writable);
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}
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pte.setUserAllowed(user_allowed);
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pte.set_user_allowed(user_allowed);
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if (page_directory->is_active())
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flushTLB(page_laddr);
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flush_tlb(page_laddr);
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#ifdef MM_DEBUG
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dbgprintf("MM: >> map_region_at_address (PD=%x) '%s' L%x => P%x (@%p)\n", page_directory, region.name.characters(), page_laddr, physical_page ? physical_page->paddr().get() : 0, physical_page.ptr());
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#endif
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@ -503,13 +503,13 @@ void MemoryManager::unmap_range(PageDirectory* page_directory, LinearAddress lad
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size_t numPages = size / PAGE_SIZE;
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for (size_t i = 0; i < numPages; ++i) {
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auto page_laddr = laddr.offset(i * PAGE_SIZE);
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auto pte = ensurePTE(page_directory, page_laddr);
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pte.setPhysicalPageBase(0);
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pte.setPresent(false);
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pte.setWritable(false);
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pte.setUserAllowed(false);
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auto pte = ensure_pte(page_directory, page_laddr);
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pte.set_physical_page_base(0);
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pte.set_present(false);
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pte.set_writable(false);
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pte.set_user_allowed(false);
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if (page_directory->is_active())
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flushTLB(page_laddr);
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flush_tlb(page_laddr);
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#ifdef MM_DEBUG
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dbgprintf("MM: << unmap_range L%x =/> 0\n", page_laddr);
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#endif
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@ -548,18 +548,18 @@ void MemoryManager::remove_kernel_alias_for_region(Region& region, byte* addr)
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unmap_range(m_kernel_page_directory, LinearAddress((dword)addr), region.size);
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}
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bool MemoryManager::unmapRegion(Process& process, Region& region)
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bool MemoryManager::unmap_region(Process& process, Region& region)
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{
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InterruptDisabler disabler;
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for (size_t i = 0; i < region.page_count(); ++i) {
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auto laddr = region.linearAddress.offset(i * PAGE_SIZE);
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auto pte = ensurePTE(process.m_page_directory, laddr);
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pte.setPhysicalPageBase(0);
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pte.setPresent(false);
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pte.setWritable(false);
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pte.setUserAllowed(false);
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auto pte = ensure_pte(process.m_page_directory, laddr);
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pte.set_physical_page_base(0);
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pte.set_present(false);
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pte.set_writable(false);
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pte.set_user_allowed(false);
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if (process.m_page_directory->is_active())
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flushTLB(laddr);
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flush_tlb(laddr);
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#ifdef MM_DEBUG
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auto& physical_page = region.vmo().physical_pages()[region.first_page_index() + i];
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dbgprintf("MM: >> Unmapped L%x => P%x <<\n", laddr, physical_page ? physical_page->paddr().get() : 0);
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@ -568,7 +568,7 @@ bool MemoryManager::unmapRegion(Process& process, Region& region)
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return true;
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}
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bool MemoryManager::mapRegion(Process& process, Region& region)
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bool MemoryManager::map_region(Process& process, Region& region)
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{
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map_region_at_address(process.m_page_directory, region, region.linearAddress, true);
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return true;
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@ -579,12 +579,12 @@ bool MemoryManager::validate_user_read(const Process& process, LinearAddress lad
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dword pageDirectoryIndex = (laddr.get() >> 22) & 0x3ff;
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dword pageTableIndex = (laddr.get() >> 12) & 0x3ff;
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auto pde = PageDirectoryEntry(&process.m_page_directory->entries[pageDirectoryIndex]);
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if (!pde.isPresent())
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if (!pde.is_present())
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return false;
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auto pte = PageTableEntry(&pde.pageTableBase()[pageTableIndex]);
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if (!pte.isPresent())
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if (!pte.is_present())
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return false;
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if (!pte.isUserAllowed())
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if (!pte.is_user_allowed())
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return false;
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return true;
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}
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@ -594,14 +594,14 @@ bool MemoryManager::validate_user_write(const Process& process, LinearAddress la
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dword pageDirectoryIndex = (laddr.get() >> 22) & 0x3ff;
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dword pageTableIndex = (laddr.get() >> 12) & 0x3ff;
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auto pde = PageDirectoryEntry(&process.m_page_directory->entries[pageDirectoryIndex]);
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if (!pde.isPresent())
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if (!pde.is_present())
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return false;
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auto pte = PageTableEntry(&pde.pageTableBase()[pageTableIndex]);
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if (!pte.isPresent())
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if (!pte.is_present())
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return false;
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if (!pte.isUserAllowed())
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if (!pte.is_user_allowed())
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return false;
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if (!pte.isWritable())
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if (!pte.is_writable())
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return false;
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return true;
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}
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