diff --git a/Kernel/Storage/AHCI.h b/Kernel/Storage/AHCI.h index 07ecac0172..64ac710bbc 100644 --- a/Kernel/Storage/AHCI.h +++ b/Kernel/Storage/AHCI.h @@ -360,6 +360,15 @@ enum HBACapabilities : u32 { SXS = 1 << 5 /* Supports External SATA */ }; +enum HBACapabilitiesExtended : u32 { + DESO = 1 << 5, /* DevSleep Entrance from Slumber Only */ + SADM = 1 << 4, /* Supports Aggressive Device Sleep Management */ + SDS = 1 << 3, /* Supports Device Sleep */ + APST = 1 << 2, /* Automatic Partial to Slumber Transitions */ + NVMP = 1 << 1, /* NVMHCI Present */ + BOH = 1 << 0, /* BIOS/OS Handoff */ +}; + // This structure is not defined by the AHCI spec, but is used within the code struct [[gnu::packed]] HBADefinedCapabilities { size_t ports_count { 1 }; @@ -382,6 +391,12 @@ struct [[gnu::packed]] HBADefinedCapabilities { bool snotification_register_supported : 1 { false }; bool native_command_queuing_supported : 1 { false }; bool addressing_64_bit_supported : 1 { false }; + bool bios_os_handoff : 1 { false }; + bool nvmhci_present : 1 { false }; + bool automatic_partial_to_slumber_transitions : 1 { false }; + bool device_sleep_supported : 1 { false }; + bool aggressive_device_sleep_management_supported : 1 { false }; + bool devsleep_entrance_from_slumber_only : 1 { false }; }; enum DeviceSignature : u32 { diff --git a/Kernel/Storage/AHCIController.cpp b/Kernel/Storage/AHCIController.cpp index 0120a65775..ca2be79c29 100644 --- a/Kernel/Storage/AHCIController.cpp +++ b/Kernel/Storage/AHCIController.cpp @@ -109,6 +109,7 @@ AHCIController::AHCIController(PCI::Address address) AHCI::HBADefinedCapabilities AHCIController::capabilities() const { u32 capabilities = hba().control_regs.cap; + u32 extended_capabilities = hba().control_regs.cap2; return (AHCI::HBADefinedCapabilities) { (capabilities & 0b11111) + 1, ((capabilities >> 8) & 0b11111) + 1, @@ -129,7 +130,13 @@ AHCI::HBADefinedCapabilities AHCIController::capabilities() const (capabilities & (u32)(AHCI::HBACapabilities::SMPS)) != 0, (capabilities & (u32)(AHCI::HBACapabilities::SSNTF)) != 0, (capabilities & (u32)(AHCI::HBACapabilities::SNCQ)) != 0, - (capabilities & (u32)(AHCI::HBACapabilities::S64A)) != 0 + (capabilities & (u32)(AHCI::HBACapabilities::S64A)) != 0, + (capabilities & (u32)(AHCI::HBACapabilitiesExtended::BOH)) != 0, + (capabilities & (u32)(AHCI::HBACapabilitiesExtended::NVMP)) != 0, + (extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::APST)) != 0, + (extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::SDS)) != 0, + (extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::SADM)) != 0, + (extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::DESO)) != 0 }; }