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Kernel/aarch64: Add volatile modifier to various asm statements
This prevents the optimizer from reordering them, which hopefully prevents future bugs.
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2 changed files with 76 additions and 76 deletions
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@ -16,36 +16,36 @@ namespace Kernel::Aarch64::Asm {
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inline void set_ttbr1_el1(FlatPtr ttbr1_el1)
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{
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asm("msr ttbr1_el1, %[value]" ::[value] "r"(ttbr1_el1));
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asm volatile("msr ttbr1_el1, %[value]" ::[value] "r"(ttbr1_el1));
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}
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inline void set_ttbr0_el1(FlatPtr ttbr0_el1)
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{
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asm("msr ttbr0_el1, %[value]" ::[value] "r"(ttbr0_el1));
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asm volatile("msr ttbr0_el1, %[value]" ::[value] "r"(ttbr0_el1));
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}
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inline FlatPtr get_ttbr0_el1()
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{
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FlatPtr ttbr0_el1;
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asm("mrs %[value], ttbr0_el1\n"
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: [value] "=r"(ttbr0_el1));
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asm volatile("mrs %[value], ttbr0_el1\n"
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: [value] "=r"(ttbr0_el1));
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return ttbr0_el1;
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}
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inline void set_sp_el1(FlatPtr sp_el1)
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{
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asm("msr sp_el1, %[value]" ::[value] "r"(sp_el1));
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asm volatile("msr sp_el1, %[value]" ::[value] "r"(sp_el1));
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}
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inline void set_tpidr_el0(FlatPtr tpidr_el0)
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{
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asm("msr tpidr_el0, %[value]" ::[value] "r"(tpidr_el0));
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asm volatile("msr tpidr_el0, %[value]" ::[value] "r"(tpidr_el0));
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}
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inline void flush()
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{
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asm("dsb ish");
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asm("isb");
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asm volatile("dsb ish");
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asm volatile("isb");
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}
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[[noreturn]] inline void halt()
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@ -66,8 +66,8 @@ inline ExceptionLevel get_current_exception_level()
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{
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u64 current_exception_level;
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asm("mrs %[value], CurrentEL"
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: [value] "=r"(current_exception_level));
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asm volatile("mrs %[value], CurrentEL"
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: [value] "=r"(current_exception_level));
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current_exception_level = (current_exception_level >> 2) & 0x3;
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return static_cast<ExceptionLevel>(current_exception_level);
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@ -83,7 +83,7 @@ inline void wait_cycles(int n)
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inline void load_el1_vector_table(void* vector_table)
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{
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asm("msr VBAR_EL1, %[value]" ::[value] "r"(vector_table));
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asm volatile("msr VBAR_EL1, %[value]" ::[value] "r"(vector_table));
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}
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inline void enter_el2_from_el3()
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