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Kernel/aarch64: Add volatile modifier to various asm statements

This prevents the optimizer from reordering them, which hopefully
prevents future bugs.
This commit is contained in:
Timon Kruiper 2023-04-06 17:11:20 +02:00 committed by Linus Groh
parent 10030038e9
commit baa5cb9e30
2 changed files with 76 additions and 76 deletions

View file

@ -16,36 +16,36 @@ namespace Kernel::Aarch64::Asm {
inline void set_ttbr1_el1(FlatPtr ttbr1_el1)
{
asm("msr ttbr1_el1, %[value]" ::[value] "r"(ttbr1_el1));
asm volatile("msr ttbr1_el1, %[value]" ::[value] "r"(ttbr1_el1));
}
inline void set_ttbr0_el1(FlatPtr ttbr0_el1)
{
asm("msr ttbr0_el1, %[value]" ::[value] "r"(ttbr0_el1));
asm volatile("msr ttbr0_el1, %[value]" ::[value] "r"(ttbr0_el1));
}
inline FlatPtr get_ttbr0_el1()
{
FlatPtr ttbr0_el1;
asm("mrs %[value], ttbr0_el1\n"
: [value] "=r"(ttbr0_el1));
asm volatile("mrs %[value], ttbr0_el1\n"
: [value] "=r"(ttbr0_el1));
return ttbr0_el1;
}
inline void set_sp_el1(FlatPtr sp_el1)
{
asm("msr sp_el1, %[value]" ::[value] "r"(sp_el1));
asm volatile("msr sp_el1, %[value]" ::[value] "r"(sp_el1));
}
inline void set_tpidr_el0(FlatPtr tpidr_el0)
{
asm("msr tpidr_el0, %[value]" ::[value] "r"(tpidr_el0));
asm volatile("msr tpidr_el0, %[value]" ::[value] "r"(tpidr_el0));
}
inline void flush()
{
asm("dsb ish");
asm("isb");
asm volatile("dsb ish");
asm volatile("isb");
}
[[noreturn]] inline void halt()
@ -66,8 +66,8 @@ inline ExceptionLevel get_current_exception_level()
{
u64 current_exception_level;
asm("mrs %[value], CurrentEL"
: [value] "=r"(current_exception_level));
asm volatile("mrs %[value], CurrentEL"
: [value] "=r"(current_exception_level));
current_exception_level = (current_exception_level >> 2) & 0x3;
return static_cast<ExceptionLevel>(current_exception_level);
@ -83,7 +83,7 @@ inline void wait_cycles(int n)
inline void load_el1_vector_table(void* vector_table)
{
asm("msr VBAR_EL1, %[value]" ::[value] "r"(vector_table));
asm volatile("msr VBAR_EL1, %[value]" ::[value] "r"(vector_table));
}
inline void enter_el2_from_el3()