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Kernel: Replace inline assembly for turning on IA32_EFER.NXE with MSR

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This fixes a triple fault that occurs when compiling serenity with
the i686 clang toolchain. (The underlying issue is that the old inline
assembly did not specify that it clobbered the eax/ecx/edx registers
and as such the compiler assumed they were not changed and used their
values across it)

Co-authored-by: Brian Gianforcaro <bgianf@serenityos.org>
This commit is contained in:
Idan Horowitz 2021-09-10 21:38:34 +03:00
parent a9e9bd8d84
commit bc7b0a8986
2 changed files with 3 additions and 5 deletions
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1
Kernel/Arch/x86/Processor.h
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@ -32,6 +32,7 @@ enum class ProcessorSpecificDataID {
# define MSR_FS_BASE 0xc0000100 # define MSR_FS_BASE 0xc0000100
# define MSR_GS_BASE 0xc0000101 # define MSR_GS_BASE 0xc0000101
#endif #endif
#define MSR_IA32_EFER 0xc0000080
// FIXME: Find a better place for these // FIXME: Find a better place for these
extern "C" void thread_context_first_enter(void); extern "C" void thread_context_first_enter(void);

7
Kernel/Arch/x86/common/Processor.cpp
View file

@ -177,11 +177,8 @@ UNMAP_AFTER_INIT void Processor::cpu_setup()
if (has_feature(CPUFeature::NX)) { if (has_feature(CPUFeature::NX)) {
// Turn on IA32_EFER.NXE // Turn on IA32_EFER.NXE
asm volatile( MSR ia32_efer(MSR_IA32_EFER);
"movl $0xc0000080, %ecx\n" ia32_efer.set(ia32_efer.get() | 0x800);
"rdmsr\n"
"orl $0x800, %eax\n"
"wrmsr\n");
} }
if (has_feature(CPUFeature::SMEP)) { if (has_feature(CPUFeature::SMEP)) {