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https://github.com/RGBCube/serenity
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Everywhere: Remove needless trailing semi-colons after functions
This is a new option in clang-format-16.
This commit is contained in:
parent
aff81d318b
commit
c911781c21
243 changed files with 483 additions and 481 deletions
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@ -70,7 +70,7 @@ public:
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protected:
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Region(u32 base, u32 size, bool mmap = false);
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void set_range(Range r) { m_range = r; };
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void set_range(Range r) { m_range = r; }
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private:
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Emulator& m_emulator;
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@ -3184,8 +3184,8 @@ void SoftCPU::CVTSD2SS_xmm1_xmm2m64(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::CVTDQ2PS_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::CVTPS2DQ_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::CVTTPS2DQ_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::SUBPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); };
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void SoftCPU::SUBSD_xmm1_xmm2m32(X86::Instruction const&) { TODO_INSN(); };
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void SoftCPU::SUBPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::SUBSD_xmm1_xmm2m32(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::MINPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::MINSD_xmm1_xmm2m32(X86::Instruction const&) { TODO_INSN(); }
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void SoftCPU::DIVPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
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@ -294,7 +294,7 @@ public:
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long double fpu_get(u8 index) { return m_fpu.fpu_get(index); }
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long double fpu_pop() { return m_fpu.fpu_pop(); }
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MMX mmx_get(u8 index) const { return m_fpu.mmx_get(index); };
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MMX mmx_get(u8 index) const { return m_fpu.mmx_get(index); }
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void set_eax(ValueWithShadow<u32> value) { gpr32(X86::RegisterEAX) = value; }
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void set_ebx(ValueWithShadow<u32> value) { gpr32(X86::RegisterEBX) = value; }
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@ -1133,7 +1133,7 @@ void SoftFPU::FNINIT(const X86::Instruction&)
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m_fpu_ds = 0;
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m_fpu_iop = 0;
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};
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}
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void SoftFPU::FNCLEX(const X86::Instruction&)
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{
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m_fpu_error_invalid = 0;
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@ -1718,7 +1718,7 @@ void SoftFPU::MOVD_mm1_rm32(const X86::Instruction& insn)
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// upper half is zeroed out
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mmx_set(mmx_index, { .raw = insn.modrm().read32(m_cpu, insn).value() });
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mmx_common();
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};
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}
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void SoftFPU::MOVD_rm32_mm2(const X86::Instruction& insn)
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{
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VERIFY(!insn.has_operand_size_override_prefix()); /* SSE2 */
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@ -1727,7 +1727,7 @@ void SoftFPU::MOVD_rm32_mm2(const X86::Instruction& insn)
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insn.modrm().write32(m_cpu, insn,
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shadow_wrap_as_initialized(static_cast<u32>(mmx_get(mmx_index).raw)));
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mmx_common();
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};
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}
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void SoftFPU::MOVQ_mm1_mm2m64(const X86::Instruction& insn)
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{
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@ -1757,8 +1757,8 @@ void SoftFPU::MOVQ_mm1m64_mm2(const X86::Instruction& insn)
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}
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mmx_common();
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}
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void SoftFPU::MOVQ_mm1_rm64(const X86::Instruction&) { TODO_INSN(); }; // long mode
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void SoftFPU::MOVQ_rm64_mm2(const X86::Instruction&) { TODO_INSN(); }; // long mode
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void SoftFPU::MOVQ_mm1_rm64(const X86::Instruction&) { TODO_INSN(); } // long mode
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void SoftFPU::MOVQ_rm64_mm2(const X86::Instruction&) { TODO_INSN(); } // long mode
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// EMPTY MMX STATE
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void SoftFPU::EMMS(const X86::Instruction&)
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