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Everywhere: Remove needless trailing semi-colons after functions

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This is a new option in clang-format-16.
This commit is contained in:
Timothy Flynn 2023-07-07 22:48:11 -04:00 • committed by Linus Groh
parent aff81d318b
commit c911781c21
243 changed files with 483 additions and 481 deletions
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2
Userland/DevTools/UserspaceEmulator/Region.h
View file

@ -70,7 +70,7 @@ public:
protected:
Region(u32 base, u32 size, bool mmap = false);
void set_range(Range r) { m_range = r; };
void set_range(Range r) { m_range = r; }
private:
Emulator& m_emulator;

4
Userland/DevTools/UserspaceEmulator/SoftCPU.cpp
View file

@ -3184,8 +3184,8 @@ void SoftCPU::CVTSD2SS_xmm1_xmm2m64(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::CVTDQ2PS_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::CVTPS2DQ_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::CVTTPS2DQ_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::SUBPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); };
void SoftCPU::SUBSD_xmm1_xmm2m32(X86::Instruction const&) { TODO_INSN(); };
void SoftCPU::SUBPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::SUBSD_xmm1_xmm2m32(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::MINPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::MINSD_xmm1_xmm2m32(X86::Instruction const&) { TODO_INSN(); }
void SoftCPU::DIVPD_xmm1_xmm2m128(X86::Instruction const&) { TODO_INSN(); }

2
Userland/DevTools/UserspaceEmulator/SoftCPU.h
View file

@ -294,7 +294,7 @@ public:
long double fpu_get(u8 index) { return m_fpu.fpu_get(index); }
long double fpu_pop() { return m_fpu.fpu_pop(); }
MMX mmx_get(u8 index) const { return m_fpu.mmx_get(index); };
MMX mmx_get(u8 index) const { return m_fpu.mmx_get(index); }
void set_eax(ValueWithShadow<u32> value) { gpr32(X86::RegisterEAX) = value; }
void set_ebx(ValueWithShadow<u32> value) { gpr32(X86::RegisterEBX) = value; }

10
Userland/DevTools/UserspaceEmulator/SoftFPU.cpp
View file

@ -1133,7 +1133,7 @@ void SoftFPU::FNINIT(const X86::Instruction&)
m_fpu_ds = 0;
m_fpu_iop = 0;
};
}
void SoftFPU::FNCLEX(const X86::Instruction&)
{
m_fpu_error_invalid = 0;
@ -1718,7 +1718,7 @@ void SoftFPU::MOVD_mm1_rm32(const X86::Instruction& insn)
// upper half is zeroed out
mmx_set(mmx_index, { .raw = insn.modrm().read32(m_cpu, insn).value() });
mmx_common();
};
}
void SoftFPU::MOVD_rm32_mm2(const X86::Instruction& insn)
{
VERIFY(!insn.has_operand_size_override_prefix()); /* SSE2 */
@ -1727,7 +1727,7 @@ void SoftFPU::MOVD_rm32_mm2(const X86::Instruction& insn)
insn.modrm().write32(m_cpu, insn,
shadow_wrap_as_initialized(static_cast<u32>(mmx_get(mmx_index).raw)));
mmx_common();
};
}
void SoftFPU::MOVQ_mm1_mm2m64(const X86::Instruction& insn)
{
@ -1757,8 +1757,8 @@ void SoftFPU::MOVQ_mm1m64_mm2(const X86::Instruction& insn)
}
mmx_common();
}
void SoftFPU::MOVQ_mm1_rm64(const X86::Instruction&) { TODO_INSN(); }; // long mode
void SoftFPU::MOVQ_rm64_mm2(const X86::Instruction&) { TODO_INSN(); }; // long mode
void SoftFPU::MOVQ_mm1_rm64(const X86::Instruction&) { TODO_INSN(); } // long mode
void SoftFPU::MOVQ_rm64_mm2(const X86::Instruction&) { TODO_INSN(); } // long mode
// EMPTY MMX STATE
void SoftFPU::EMMS(const X86::Instruction&)