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Kernel/Storage: Simplify AHCIPortHandler class
The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
This commit is contained in:
Liav A
Idan Horowitz
parent
4169ac4a7b
commit
cc734c106e
6 changed files with 98 additions and 109 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2021-2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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@ -10,6 +10,7 @@
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#include <AK/RefPtr.h>
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#include <AK/Types.h>
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#include <Kernel/Bus/PCI/API.h>
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#include <Kernel/CommandLine.h>
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#include <Kernel/Memory/MemoryManager.h>
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#include <Kernel/Storage/ATA/AHCIController.h>
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#include <Kernel/Storage/ATA/AHCIPortHandler.h>
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@ -52,20 +53,16 @@ bool AHCIController::shutdown()
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size_t AHCIController::devices_count() const
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{
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size_t count = 0;
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for (auto& port_handler : m_handlers) {
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port_handler.enumerate_ports([&](AHCIPort const& port) {
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if (port.connected_device())
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count++;
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});
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for (auto port : m_ports) {
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if (port && port->connected_device())
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count++;
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}
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return count;
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}
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void AHCIController::start_request(ATADevice const& device, AsyncBlockDeviceRequest& request)
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{
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// FIXME: For now we have one port handler, check all of them...
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VERIFY(m_handlers.size() > 0);
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auto port = m_handlers[0].port_at_index(device.ata_address().port);
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auto port = m_ports[device.ata_address().port];
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VERIFY(port);
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port->start_request(request);
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}
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@ -90,10 +87,16 @@ UNMAP_AFTER_INIT AHCIController::AHCIController(PCI::DeviceIdentifier const& pci
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: ATAController()
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, PCI::Device(pci_device_identifier.address())
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, m_hba_region(default_hba_region())
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, m_capabilities(capabilities())
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, m_hba_capabilities(capabilities())
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{
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}
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PhysicalAddress AHCIController::get_identify_metadata_physical_region(Badge<AHCIPort>, u32 port_index) const
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{
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dbgln_if(AHCI_DEBUG, "AHCI Controller @ {}: Get identify metadata physical address of port {} - {}", pci_address(), port_index, (port_index * 512) / PAGE_SIZE);
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return m_identify_metadata_pages[(port_index * 512) / PAGE_SIZE].paddr().offset((port_index * 512) % PAGE_SIZE);
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}
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AHCI::HBADefinedCapabilities AHCIController::capabilities() const
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{
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u32 capabilities = hba().control_regs.cap;
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@ -145,7 +148,7 @@ UNMAP_AFTER_INIT void AHCIController::initialize_hba(PCI::DeviceIdentifier const
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return;
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}
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dmesgln("{}: AHCI controller reset", pci_address());
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dbgln("{}: AHCI command list entries count - {}", pci_address(), hba_capabilities().max_command_list_entries_count);
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dbgln("{}: AHCI command list entries count - {}", pci_address(), m_hba_capabilities.max_command_list_entries_count);
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u32 version = hba().control_regs.version;
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dbgln_if(AHCI_DEBUG, "{}: AHCI Controller Version = {:#08x}", pci_address(), version);
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@ -155,8 +158,34 @@ UNMAP_AFTER_INIT void AHCIController::initialize_hba(PCI::DeviceIdentifier const
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PCI::enable_bus_mastering(pci_address());
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enable_global_interrupts();
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auto port_handler = AHCIPortHandler::create(*this, pci_device_identifier.interrupt_line().value(), AHCI::MaskedBitField((u32 volatile&)(hba().control_regs.pi))).release_value_but_fixme_should_propagate_errors();
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m_handlers.append(move(port_handler));
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auto implemented_ports = AHCI::MaskedBitField((u32 volatile&)(hba().control_regs.pi));
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m_irq_handler = AHCIPortHandler::create(*this, pci_device_identifier.interrupt_line().value(), implemented_ports).release_value_but_fixme_should_propagate_errors();
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// FIXME: Use the number of ports to determine how many pages we should allocate.
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for (size_t index = 0; index < (((size_t)AHCI::Limits::MaxPorts * 512) / PAGE_SIZE); index++) {
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m_identify_metadata_pages.append(MM.allocate_supervisor_physical_page().release_value_but_fixme_should_propagate_errors());
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}
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if (kernel_command_line().ahci_reset_mode() == AHCIResetMode::Aggressive) {
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for (auto index : implemented_ports.to_vector()) {
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auto port = AHCIPort::create(*this, m_hba_capabilities, static_cast<volatile AHCI::PortRegisters&>(hba().port_regs[index]), index).release_value_but_fixme_should_propagate_errors();
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m_ports[index] = port;
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port->reset();
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}
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return;
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}
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for (auto index : implemented_ports.to_vector()) {
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auto port = AHCIPort::create(*this, m_hba_capabilities, static_cast<volatile AHCI::PortRegisters&>(hba().port_regs[index]), index).release_value_but_fixme_should_propagate_errors();
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m_ports[index] = port;
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port->initialize_without_reset();
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}
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}
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void AHCIController::handle_interrupt_for_port(Badge<AHCIPortHandler>, u32 port_index) const
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{
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auto port = m_ports[port_index];
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VERIFY(port);
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port->handle_interrupt();
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}
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void AHCIController::disable_global_interrupts() const
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@ -170,16 +199,10 @@ void AHCIController::enable_global_interrupts() const
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RefPtr<StorageDevice> AHCIController::device_by_port(u32 port_index) const
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{
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for (auto& port_handler : m_handlers) {
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if (!port_handler.is_responsible_for_port_index(port_index))
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continue;
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auto port = port_handler.port_at_index(port_index);
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if (!port)
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return nullptr;
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return port->connected_device();
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}
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return nullptr;
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auto port = m_ports[port_index];
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if (!port)
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return {};
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return port->connected_device();
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}
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RefPtr<StorageDevice> AHCIController::device(u32 index) const
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2021-2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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@ -22,7 +22,6 @@ class AHCIPort;
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class AHCIController final : public ATAController
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, public PCI::Device {
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friend class AHCIPortHandler;
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friend class AHCIPort;
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public:
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static NonnullRefPtr<AHCIController> initialize(PCI::DeviceIdentifier const& pci_device_identifier);
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@ -35,7 +34,8 @@ public:
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virtual void start_request(ATADevice const&, AsyncBlockDeviceRequest&) override;
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virtual void complete_current_request(AsyncDeviceRequest::RequestResult) override;
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const AHCI::HBADefinedCapabilities& hba_capabilities() const { return m_capabilities; };
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PhysicalAddress get_identify_metadata_physical_region(Badge<AHCIPort>, u32 port_index) const;
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void handle_interrupt_for_port(Badge<AHCIPortHandler>, u32 port_index) const;
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private:
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void disable_global_interrupts() const;
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@ -51,8 +51,12 @@ private:
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NonnullOwnPtr<Memory::Region> default_hba_region() const;
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volatile AHCI::HBA& hba() const;
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NonnullRefPtrVector<Memory::PhysicalPage> m_identify_metadata_pages;
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Array<RefPtr<AHCIPort>, 32> m_ports;
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NonnullOwnPtr<Memory::Region> m_hba_region;
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AHCI::HBADefinedCapabilities m_capabilities;
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NonnullRefPtrVector<AHCIPortHandler> m_handlers;
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AHCI::HBADefinedCapabilities m_hba_capabilities;
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// FIXME: There could be multiple IRQ (MSI) handlers for AHCI. Find a way to use all of them.
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OwnPtr<AHCIPortHandler> m_irq_handler;
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};
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}
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@ -20,9 +20,9 @@
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namespace Kernel {
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UNMAP_AFTER_INIT ErrorOr<NonnullRefPtr<AHCIPort>> AHCIPort::create(AHCIPortHandler const& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
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UNMAP_AFTER_INIT ErrorOr<NonnullRefPtr<AHCIPort>> AHCIPort::create(AHCIController const& controller, AHCI::HBADefinedCapabilities hba_capabilities, volatile AHCI::PortRegisters& registers, u32 port_index)
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{
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auto port = TRY(adopt_nonnull_ref_or_enomem(new (nothrow) AHCIPort(handler, registers, port_index)));
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auto port = TRY(adopt_nonnull_ref_or_enomem(new (nothrow) AHCIPort(controller, hba_capabilities, registers, port_index)));
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TRY(port->allocate_resources_and_initialize_ports());
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return port;
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}
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@ -53,10 +53,11 @@ ErrorOr<void> AHCIPort::allocate_resources_and_initialize_ports()
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return {};
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}
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UNMAP_AFTER_INIT AHCIPort::AHCIPort(AHCIPortHandler const& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
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UNMAP_AFTER_INIT AHCIPort::AHCIPort(AHCIController const& controller, AHCI::HBADefinedCapabilities hba_capabilities, volatile AHCI::PortRegisters& registers, u32 port_index)
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: m_port_index(port_index)
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, m_hba_capabilities(hba_capabilities)
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, m_port_registers(registers)
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, m_parent_handler(handler)
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, m_parent_controller(controller)
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, m_interrupt_status((u32 volatile&)m_port_registers.is)
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, m_interrupt_enable((u32 volatile&)m_port_registers.ie)
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{
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@ -177,8 +178,14 @@ void AHCIPort::recover_from_fatal_error()
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{
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MutexLocker locker(m_lock);
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SpinlockLocker lock(m_hard_lock);
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dmesgln("{}: AHCI Port {} fatal error, shutting down!", m_parent_handler->hba_controller()->pci_address(), representative_port_index());
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dmesgln("{}: AHCI Port {} fatal error, SError {}", m_parent_handler->hba_controller()->pci_address(), representative_port_index(), (u32)m_port_registers.serr);
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RefPtr<AHCIController> controller = m_parent_controller.strong_ref();
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if (!controller) {
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dmesgln("AHCI Port {}: fatal error, controller not available", representative_port_index());
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return;
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}
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dmesgln("{}: AHCI Port {} fatal error, shutting down!", controller->pci_address(), representative_port_index());
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dmesgln("{}: AHCI Port {} fatal error, SError {}", controller->pci_address(), representative_port_index(), (u32)m_port_registers.serr);
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stop_command_list_processing();
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stop_fis_receiving();
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m_interrupt_enable.clear();
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@ -319,8 +326,12 @@ bool AHCIPort::initialize()
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size_t logical_sector_size = 512;
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size_t physical_sector_size = 512;
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u64 max_addressable_sector = 0;
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RefPtr<AHCIController> controller = m_parent_controller.strong_ref();
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if (!controller)
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return false;
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if (identify_device()) {
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auto identify_block = Memory::map_typed<ATAIdentifyBlock>(m_parent_handler->get_identify_metadata_physical_region(m_port_index)).release_value_but_fixme_should_propagate_errors();
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auto identify_block = Memory::map_typed<ATAIdentifyBlock>(controller->get_identify_metadata_physical_region({}, m_port_index)).release_value_but_fixme_should_propagate_errors();
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// Check if word 106 is valid before using it!
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if ((identify_block->physical_sector_size_to_logical_sector_size >> 14) == 1) {
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if (identify_block->physical_sector_size_to_logical_sector_size & (1 << 12)) {
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@ -345,7 +356,7 @@ bool AHCIPort::initialize()
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// FIXME: We don't support ATAPI devices yet, so for now we don't "create" them
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if (!is_atapi_attached()) {
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m_connected_device = ATADiskDevice::create(m_parent_handler->hba_controller(), { m_port_index, 0 }, 0, logical_sector_size, max_addressable_sector);
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m_connected_device = ATADiskDevice::create(*controller, { m_port_index, 0 }, 0, logical_sector_size, max_addressable_sector);
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} else {
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dbgln("AHCI Port {}: Ignoring ATAPI devices for now as we don't currently support them.", representative_port_index());
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}
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@ -647,6 +658,10 @@ bool AHCIPort::identify_device()
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if (!spin_until_ready())
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return false;
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RefPtr<AHCIController> controller = m_parent_controller.strong_ref();
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if (!controller)
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return false;
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auto unused_command_header = try_to_find_unused_command_header();
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VERIFY(unused_command_header.has_value());
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auto* command_list_entries = (volatile AHCI::CommandHeader*)m_command_list_region->vaddr().as_ptr();
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@ -663,7 +678,7 @@ bool AHCIPort::identify_device()
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auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
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memset(const_cast<u8*>(command_table.command_fis), 0, 64);
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command_table.descriptors[0].base_high = 0;
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command_table.descriptors[0].base_low = m_parent_handler->get_identify_metadata_physical_region(m_port_index).get();
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command_table.descriptors[0].base_low = controller->get_identify_metadata_physical_region({}, m_port_index).get();
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command_table.descriptors[0].byte_count = 512 - 1;
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auto& fis = *(volatile FIS::HostToDevice::Register*)command_table.command_fis;
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fis.header.fis_type = (u8)FIS::Type::RegisterHostToDevice;
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@ -799,8 +814,8 @@ void AHCIPort::spin_up() const
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{
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VERIFY(m_lock.is_locked());
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VERIFY(m_hard_lock.is_locked());
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dbgln_if(AHCI_DEBUG, "AHCI Port {}: Spin up. Staggered spin up? {}", representative_port_index(), m_parent_handler->hba_capabilities().staggered_spin_up_supported);
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if (!m_parent_handler->hba_capabilities().staggered_spin_up_supported)
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dbgln_if(AHCI_DEBUG, "AHCI Port {}: Spin up. Staggered spin up? {}", representative_port_index(), m_hba_capabilities.staggered_spin_up_supported);
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if (!m_hba_capabilities.staggered_spin_up_supported)
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return;
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dbgln_if(AHCI_DEBUG, "AHCI Port {}: Spinning up device.", representative_port_index());
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m_port_registers.cmd = m_port_registers.cmd | (1 << 1);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2021-2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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@ -33,11 +33,10 @@ class AHCIPortHandler;
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class AHCIPort
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: public RefCounted<AHCIPort>
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, public Weakable<AHCIPort> {
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friend class AHCIPortHandler;
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friend class AHCIController;
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public:
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static ErrorOr<NonnullRefPtr<AHCIPort>> create(AHCIPortHandler const&, volatile AHCI::PortRegisters&, u32 port_index);
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static ErrorOr<NonnullRefPtr<AHCIPort>> create(AHCIController const&, AHCI::HBADefinedCapabilities, volatile AHCI::PortRegisters&, u32 port_index);
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u32 port_index() const { return m_port_index; }
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u32 representative_port_index() const { return port_index() + 1; }
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@ -56,7 +55,7 @@ private:
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bool is_phy_enabled() const { return (m_port_registers.ssts & 0xf) == 3; }
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bool initialize();
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AHCIPort(AHCIPortHandler const&, volatile AHCI::PortRegisters&, u32 port_index);
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AHCIPort(AHCIController const&, AHCI::HBADefinedCapabilities, volatile AHCI::PortRegisters&, u32 port_index);
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ALWAYS_INLINE void clear_sata_error_register() const;
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@ -119,8 +118,14 @@ private:
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RefPtr<ATADevice> m_connected_device;
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u32 m_port_index;
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// Note: Ideally the AHCIController should be the only object to hold this data
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// but because using the m_parent_controller means we need to take a strong ref,
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// it's probably better to just "cache" this here instead.
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AHCI::HBADefinedCapabilities const m_hba_capabilities;
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volatile AHCI::PortRegisters& m_port_registers;
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NonnullRefPtr<AHCIPortHandler> m_parent_handler;
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WeakPtr<AHCIController> m_parent_controller;
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AHCI::PortInterruptStatusBitField m_interrupt_status;
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AHCI::PortInterruptEnableBitField m_interrupt_enable;
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@ -1,46 +1,25 @@
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/*
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2021-2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/CommandLine.h>
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#include <Kernel/Storage/ATA/AHCIPortHandler.h>
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namespace Kernel {
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UNMAP_AFTER_INIT ErrorOr<NonnullRefPtr<AHCIPortHandler>> AHCIPortHandler::create(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
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UNMAP_AFTER_INIT ErrorOr<NonnullOwnPtr<AHCIPortHandler>> AHCIPortHandler::create(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
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{
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auto port_handler = TRY(adopt_nonnull_ref_or_enomem(new (nothrow) AHCIPortHandler(controller, irq, taken_ports)));
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// FIXME: Propagate errors from this method too.
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auto port_handler = TRY(adopt_nonnull_own_or_enomem(new (nothrow) AHCIPortHandler(controller, irq, taken_ports)));
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port_handler->allocate_resources_and_initialize_ports();
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return port_handler;
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}
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void AHCIPortHandler::allocate_resources_and_initialize_ports()
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{
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// FIXME: Use the number of taken ports to determine how many pages we should allocate.
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for (size_t index = 0; index < (((size_t)AHCI::Limits::MaxPorts * 512) / PAGE_SIZE); index++) {
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m_identify_metadata_pages.append(MM.allocate_supervisor_physical_page().release_value_but_fixme_should_propagate_errors());
|
||||
}
|
||||
|
||||
// Clear pending interrupts, if there are any!
|
||||
m_pending_ports_interrupts.set_all();
|
||||
enable_irq();
|
||||
|
||||
if (kernel_command_line().ahci_reset_mode() == AHCIResetMode::Aggressive) {
|
||||
for (auto index : m_taken_ports.to_vector()) {
|
||||
auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(m_parent_controller->hba().port_regs[index]), index).release_value_but_fixme_should_propagate_errors();
|
||||
m_handled_ports[index] = port;
|
||||
port->reset();
|
||||
}
|
||||
return;
|
||||
}
|
||||
for (auto index : m_taken_ports.to_vector()) {
|
||||
auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(m_parent_controller->hba().port_regs[index]), index).release_value_but_fixme_should_propagate_errors();
|
||||
m_handled_ports[index] = port;
|
||||
port->initialize_without_reset();
|
||||
}
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
|
||||
|
|
@ -52,36 +31,11 @@ UNMAP_AFTER_INIT AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8
|
|||
dbgln_if(AHCI_DEBUG, "AHCI Port Handler: IRQ {}", irq);
|
||||
}
|
||||
|
||||
void AHCIPortHandler::enumerate_ports(Function<void(AHCIPort const&)> callback) const
|
||||
{
|
||||
for (auto port : m_handled_ports) {
|
||||
if (port)
|
||||
callback(*port);
|
||||
}
|
||||
}
|
||||
|
||||
RefPtr<AHCIPort> AHCIPortHandler::port_at_index(u32 port_index) const
|
||||
{
|
||||
VERIFY(m_taken_ports.is_set_at(port_index));
|
||||
return m_handled_ports[port_index];
|
||||
}
|
||||
|
||||
PhysicalAddress AHCIPortHandler::get_identify_metadata_physical_region(u32 port_index) const
|
||||
{
|
||||
dbgln_if(AHCI_DEBUG, "AHCI Port Handler: Get identify metadata physical address of port {} - {}", port_index, (port_index * 512) / PAGE_SIZE);
|
||||
return m_identify_metadata_pages[(port_index * 512) / PAGE_SIZE].paddr().offset((port_index * 512) % PAGE_SIZE);
|
||||
}
|
||||
|
||||
AHCI::MaskedBitField AHCIPortHandler::create_pending_ports_interrupts_bitfield() const
|
||||
{
|
||||
return AHCI::MaskedBitField((u32 volatile&)m_parent_controller->hba().control_regs.is, m_taken_ports.bit_mask());
|
||||
}
|
||||
|
||||
AHCI::HBADefinedCapabilities AHCIPortHandler::hba_capabilities() const
|
||||
{
|
||||
return m_parent_controller->hba_capabilities();
|
||||
}
|
||||
|
||||
AHCIPortHandler::~AHCIPortHandler() = default;
|
||||
|
||||
bool AHCIPortHandler::handle_irq(RegisterState const&)
|
||||
|
|
@ -90,10 +44,8 @@ bool AHCIPortHandler::handle_irq(RegisterState const&)
|
|||
if (m_pending_ports_interrupts.is_zeroed())
|
||||
return false;
|
||||
for (auto port_index : m_pending_ports_interrupts.to_vector()) {
|
||||
auto port = m_handled_ports[port_index];
|
||||
VERIFY(port);
|
||||
dbgln_if(AHCI_DEBUG, "AHCI Port Handler: Handling IRQ for port {}", port_index);
|
||||
port->handle_interrupt();
|
||||
m_parent_controller->handle_interrupt_for_port({}, port_index);
|
||||
// We do this to clear the pending interrupt after we handled it.
|
||||
m_pending_ports_interrupts.set_at(port_index);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
|
||||
* Copyright (c) 2021-2022, Liav A. <liavalb@hotmail.co.il>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
|
@ -26,20 +26,15 @@ class AsyncBlockDeviceRequest;
|
|||
|
||||
class AHCIController;
|
||||
class AHCIPort;
|
||||
class AHCIPortHandler final : public RefCounted<AHCIPortHandler>
|
||||
, public IRQHandler {
|
||||
class AHCIPortHandler final : public IRQHandler {
|
||||
friend class AHCIController;
|
||||
|
||||
public:
|
||||
static ErrorOr<NonnullRefPtr<AHCIPortHandler>> create(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports);
|
||||
static ErrorOr<NonnullOwnPtr<AHCIPortHandler>> create(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports);
|
||||
virtual ~AHCIPortHandler() override;
|
||||
|
||||
virtual StringView purpose() const override { return "SATA Port Handler"sv; }
|
||||
|
||||
AHCI::HBADefinedCapabilities hba_capabilities() const;
|
||||
NonnullRefPtr<AHCIController> hba_controller() const { return m_parent_controller; }
|
||||
PhysicalAddress get_identify_metadata_physical_region(u32 port_index) const;
|
||||
|
||||
bool is_responsible_for_port_index(u32 port_index) const { return m_taken_ports.is_set_at(port_index); }
|
||||
|
||||
private:
|
||||
|
|
@ -57,13 +52,8 @@ private:
|
|||
|
||||
AHCI::MaskedBitField create_pending_ports_interrupts_bitfield() const;
|
||||
|
||||
void enumerate_ports(Function<void(AHCIPort const&)> callback) const;
|
||||
RefPtr<AHCIPort> port_at_index(u32 port_index) const;
|
||||
|
||||
// Data members
|
||||
Array<RefPtr<AHCIPort>, 32> m_handled_ports;
|
||||
NonnullRefPtr<AHCIController> m_parent_controller;
|
||||
NonnullRefPtrVector<Memory::PhysicalPage> m_identify_metadata_pages;
|
||||
AHCI::MaskedBitField m_taken_ports;
|
||||
AHCI::MaskedBitField m_pending_ports_interrupts;
|
||||
};
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue