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Kernel: Detect and store the virtual address bit width during CPU init

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This commit is contained in:
Idan Horowitz 2021-10-04 23:41:10 +03:00 • committed by Andreas Kling
parent d872f0d503
commit cd975668d6
2 changed files with 7 additions and 0 deletions
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2
Kernel/Arch/x86/Processor.h
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@ -129,6 +129,7 @@ class Processor {
CPUFeature m_features;
static Atomic<u32> g_total_processors;
u8 m_physical_address_bit_width;
u8 m_virtual_address_bit_width;
ProcessorInfo* m_info;
Thread* m_current_thread;
@ -253,6 +254,7 @@ public:
}
ALWAYS_INLINE u8 physical_address_bit_width() const { return m_physical_address_bit_width; }
ALWAYS_INLINE u8 virtual_address_bit_width() const { return m_virtual_address_bit_width; }
ALWAYS_INLINE ProcessorInfo& info() { return *m_info; }

5
Kernel/Arch/x86/common/Processor.cpp
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@ -138,9 +138,13 @@ UNMAP_AFTER_INIT void Processor::cpu_detect()
// CPUID.80000008H:EAX[7:0] reports the physical-address width supported by the processor.
CPUID cpuid(0x80000008);
m_physical_address_bit_width = cpuid.eax() & 0xff;
// CPUID.80000008H:EAX[15:8] reports the linear-address width supported by the processor.
m_virtual_address_bit_width = (cpuid.eax() >> 8) & 0xff;
} else {
// For processors that do not support CPUID function 80000008H, the width is generally 36 if CPUID.01H:EDX.PAE [bit 6] = 1 and 32 otherwise.
m_physical_address_bit_width = has_feature(CPUFeature::PAE) ? 36 : 32;
// Processors that do not support CPUID function 80000008H, support a linear-address width of 32.
m_virtual_address_bit_width = 32;
}
CPUID extended_features(0x7);
@ -335,6 +339,7 @@ UNMAP_AFTER_INIT void Processor::initialize(u32 cpu)
if (!has_feature(CPUFeature::RDRAND))
dmesgln("CPU[{}]: No RDRAND support detected, randomness will be poor", current_id());
dmesgln("CPU[{}]: Physical address bit width: {}", current_id(), m_physical_address_bit_width);
dmesgln("CPU[{}]: Virtual address bit width: {}", current_id(), m_virtual_address_bit_width);
if (cpu == 0)
idt_init();