mirror of
https://github.com/RGBCube/serenity
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Kernel::x86_64: Re-copy boot.S and add longmode in
Now we should have the posibility to run in longmode, after enabling it in the gdt
This commit is contained in:
Hendiadyoin1
Andreas Kling
parent
61240aaad3
commit
ce4f43a192
1 changed files with 251 additions and 3 deletions
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@ -1,3 +1,4 @@
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.code32
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.set MULTIBOOT_MAGIC, 0x1badb002
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.set MULTIBOOT_PAGE_ALIGN, 0x1
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.set MULTIBOOT_MEMORY_INFO, 0x2
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@ -61,12 +62,42 @@ boot_pd3_pt1023:
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.global start
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.type start, @function
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.extern init
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.extern init
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.type init, @function
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.extern multiboot_info_ptr
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.type multiboot_info_ptr, @object
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/*
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construct the following (32-bit PAE) page table layout:
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pdpt
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0: boot_pd0 (0-1GB)
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1: n/a (1-2GB)
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2: n/a (2-3GB)
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3: boot_pd3 (3-4GB)
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boot_pd0 : 512 pde's
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0: boot_pd0_pt0 (0-2MB) (id 512 4KB pages)
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boot_pd3 : 512 pde's
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0: boot_pd3_pts[0] (3072-3074MB) (pseudo 512 4KB pages)
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1: boot_pd3_pts[1] (3074-3076MB) (pseudo 512 4KB pages)
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2: boot_pd3_pts[2] (3076-3078MB) (pseudo 512 4KB pages)
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3: boot_pd3_pts[3] (3078-3080MB) (pseudo 512 4KB pages)
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4: boot_pd3_pts[4] (3080-3082MB) (pseudo 512 4KB pages)
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5: boot_pd3_pts[5] (3082-3084MB) (pseudo 512 4KB pages)
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6: boot_pd3_pts[6] (3084-3086MB) (pseudo 512 4KB pages)
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7: boot_pd3_pts[7] (3086-3088MB) (pseudo 512 4KB pages)
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8: boot_pd3_pt1023 (4094-4096MB) (for page table mappings)
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the 9 page tables each contain 512 pte's that map individual 4KB pages
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*/
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start:
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cli
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cld
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@ -84,6 +115,139 @@ start:
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movl $(kernel_cmdline - 0xc0000000), %edi
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rep movsl
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/* clear pdpt */
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movl $(boot_pdpt - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* set up pdpt[0] and pdpt[3] */
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movl $(boot_pdpt - 0xc0000000), %edi
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movl $((boot_pd0 - 0xc0000000) + 1), 0(%edi)
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movl $((boot_pd3 - 0xc0000000) + 1), 24(%edi)
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/* clear pd0 */
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movl $(boot_pd0 - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd3 */
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd0's pt's */
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movl $(boot_pd0_pt0 - 0xc0000000), %edi
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movl $(1024 * 4), %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd3's pt's */
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movl $(boot_pd3_pts - 0xc0000000), %edi
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movl $(1024 * 9), %ecx
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xorl %eax, %eax
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rep stosl
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/* add boot_pd0_pt0 to boot_pd0 */
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movl $(boot_pd0 - 0xc0000000), %edi
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movl $(boot_pd0_pt0 - 0xc0000000), %eax
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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/* add boot_pd3_pts to boot_pd3 */
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movl $8, %ecx
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $(boot_pd3_pts - 0xc0000000), %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* identity map the 0 to 2MB range */
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movl $512, %ecx
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movl $(boot_pd0_pt0 - 0xc0000000), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* pseudo identity map the 3072-3090MB range */
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movl $(512 * 8), %ecx
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movl $(boot_pd3_pts - 0xc0000000), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* create an empty page table for the top 2MB at the 4GB mark */
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $(boot_pd3_pt1023 - 0xc0000000), 4088(%edi)
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orl $0x3, 4088(%edi)
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movl $0, 4092(%edi)
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/* point CR3 to PDPT */
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movl $(boot_pdpt - 0xc0000000), %eax
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movl %eax, %cr3
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/* enable PAE + PSE */
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movl %cr4, %eax
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orl $0x60, %eax
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movl %eax, %cr4
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1:
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/* Enter Long-mode! ref(https://wiki.osdev.org/Setting_Up_Long_Mode)*/
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mov $0xC0000080, %ecx /* Set the C-register to 0xC0000080, which is the EFER MSR.*/
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rdmsr /* Read from the model-specific register.*/
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or $(1 << 8), %eax /* Set the LM-bit which is the 9th bit (bit 8).*/
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wrmsr /* Write to the model-specific register.*/
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/* enable PG */
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movl %cr0, %eax
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orl $0x80000000, %eax
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movl %eax, %cr0
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/* Now we are in 32-bit compatablity mode, We still need to load a 64-bit GDT */
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/* set up stack */
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mov $stack_top, %esp
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and $-16, %esp
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/* jmp to an address above the 3GB mark */
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movl $1f,%eax
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jmp *%eax
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1:
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movl %cr3, %eax
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movl %eax, %cr3
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/* unmap the 0-1MB range, which isn't used after jmp-ing up here */
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movl $256, %ecx
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movl $(boot_pd0_pt0 - 0xc0000000), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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addl $8, %edi
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loop 1b
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/* jump into C++ land */
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addl $0xc0000000, %ebx
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movl %ebx, multiboot_info_ptr
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call init
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add $4, %esp
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@ -131,8 +295,92 @@ apic_ap_start:
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ljmpl $8, $(apic_ap_start32 - apic_ap_start + 0x8000)
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apic_ap_start32:
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.code32
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cli
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hlt
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mov $0x10, %ax
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mov %ax, %ss
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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movl $0x8000, %ebp
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/* generate a unique ap cpu id (0 means 1st ap, not bsp!) */
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xorl %eax, %eax
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incl %eax
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lock; xaddl %eax, (ap_cpu_id - apic_ap_start)(%ebp) /* avoid relocation entries */
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movl %eax, %esi
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/* find our allocated stack based on the generated id */
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movl (ap_cpu_init_stacks - apic_ap_start)(%ebp, %eax, 4), %esp
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/* check if we support NX and enable it if we do */
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movl $0x80000001, %eax
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cpuid
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testl $0x100000, %edx
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je (1f - apic_ap_start + 0x8000)
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/* turn on IA32_EFER.NXE */
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movl $0xc0000080, %ecx
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rdmsr
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orl $0x800, %eax
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wrmsr
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1:
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/* load the bsp's cr3 value */
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movl (ap_cpu_init_cr3 - apic_ap_start)(%ebp), %eax
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movl %eax, %cr3
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/* enable PAE + PSE */
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movl %cr4, %eax
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orl $0x60, %eax
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movl %eax, %cr4
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/* enable PG */
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movl %cr0, %eax
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orl $0x80000000, %eax
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movl %eax, %cr0
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/* load a second temporary gdt that points above 3GB */
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lgdt (ap_cpu_gdtr_initial2 - apic_ap_start + 0xc0008000)
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/* jump above 3GB into our identity mapped area now */
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ljmp $8, $(apic_ap_start32_2 - apic_ap_start + 0xc0008000)
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apic_ap_start32_2:
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/* flush the TLB */
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movl %cr3, %eax
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movl %eax, %cr3
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movl $0xc0008000, %ebp
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/* now load the final gdt and idt from the identity mapped area */
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movl (ap_cpu_gdtr - apic_ap_start)(%ebp), %eax
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lgdt (%eax)
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movl (ap_cpu_idtr - apic_ap_start)(%ebp), %eax
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lidt (%eax)
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/* set same cr0 and cr4 values as the BSP */
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movl (ap_cpu_init_cr0 - apic_ap_start)(%ebp), %eax
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movl %eax, %cr0
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movl (ap_cpu_init_cr4 - apic_ap_start)(%ebp), %eax
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movl %eax, %cr4
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/* push the Processor pointer this CPU is going to use */
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movl (ap_cpu_init_processor_info_array - apic_ap_start)(%ebp), %eax
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addl $0xc0000000, %eax
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movl 0(%eax, %esi, 4), %eax
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push %eax
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/* push the cpu id, 0 representing the bsp and call into c++ */
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incl %esi
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push %esi
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xor %ebp, %ebp
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cld
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/* We are in identity mapped P0x8000 and the BSP will unload this code
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once all APs are initialized, so call init_ap but return to our
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infinite loop */
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push $loop
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ljmp $8, $init_ap
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.align 4
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.global apic_ap_start_size
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