diff --git a/Kernel/Arch/i386/CPU.cpp b/Kernel/Arch/i386/CPU.cpp index a062c455a6..88adf2f018 100644 --- a/Kernel/Arch/i386/CPU.cpp +++ b/Kernel/Arch/i386/CPU.cpp @@ -788,10 +788,20 @@ void Processor::cpu_detect() set_feature(CPUFeature::TSC); if (processor_info.ecx() & (1 << 30)) set_feature(CPUFeature::RDRAND); - + if (processor_info.edx() & (1 << 11)) { + u32 stepping = processor_info.eax() & 0xf; + u32 model = (processor_info.eax() >> 4) & 0xf; + u32 family = (processor_info.eax() >> 8) & 0xf; + if (!(family == 6 && model < 3 && stepping < 3)) + set_feature(CPUFeature::SEP); + } CPUID extended_processor_info(0x80000001); if (extended_processor_info.edx() & (1 << 20)) set_feature(CPUFeature::NX); + if (extended_processor_info.edx() & (1 << 11)) { + // Only available in 64 bit mode + set_feature(CPUFeature::SYSCALL); + } CPUID extended_features(0x7); if (extended_features.ebx() & (1 << 20)) @@ -895,6 +905,10 @@ String Processor::features_string() const return "tsc"; case CPUFeature::UMIP: return "umip"; + case CPUFeature::SEP: + return "sep"; + case CPUFeature::SYSCALL: + return "syscall"; // no default statement here intentionally so that we get // a warning if a new feature is forgotten to be added here } diff --git a/Kernel/Arch/i386/CPU.h b/Kernel/Arch/i386/CPU.h index 60f92e6786..95f8980a50 100644 --- a/Kernel/Arch/i386/CPU.h +++ b/Kernel/Arch/i386/CPU.h @@ -599,7 +599,9 @@ enum class CPUFeature : u32 { SMEP = (1 << 6), SSE = (1 << 7), TSC = (1 << 8), - UMIP = (1 << 9) + UMIP = (1 << 9), + SEP = (1 << 10), + SYSCALL = (1 << 11) }; class Thread; @@ -613,6 +615,13 @@ struct TrapFrame; #define GDT_SELECTOR_PROC 0x30 #define GDT_SELECTOR_TSS 0x38 +// SYSENTER makes certain assumptions on how the GDT is structured: +static_assert(GDT_SELECTOR_CODE0 + 8 == GDT_SELECTOR_DATA0); // SS0 = CS0 + 8 + +// SYSEXIT makes certain assumptions on how the GDT is structured: +static_assert(GDT_SELECTOR_CODE0 + 16 == GDT_SELECTOR_CODE3); // CS3 = CS0 + 16 +static_assert(GDT_SELECTOR_CODE0 + 24 == GDT_SELECTOR_DATA3); // SS3 = CS0 + 32 + class ProcessorInfo; struct MemoryManagerData; struct ProcessorMessageEntry;