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Kernel/Storage: Add a whole bunch of AHCI debug output

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This commit is contained in:
Luke 2021-03-18 05:24:39 +00:00 • committed by Andreas Kling
parent b7dd5dc7c3
commit cf9ce0d857
3 changed files with 52 additions and 4 deletions
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9
Kernel/Storage/AHCIController.cpp
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@ -44,6 +44,8 @@ bool AHCIController::reset()
{
hba().control_regs.ghc = 1;
dbgln_if(AHCI_DEBUG, "{}: AHCI Controller reset", pci_address());
full_memory_barrier();
size_t retry = 0;
@ -110,6 +112,9 @@ AHCI::HBADefinedCapabilities AHCIController::capabilities() const
{
u32 capabilities = hba().control_regs.cap;
u32 extended_capabilities = hba().control_regs.cap2;
dbgln_if(AHCI_DEBUG, "{}: AHCI Controller Capabilities = 0x{:08x}, Extended Capabilities = 0x{:08x}", pci_address(), capabilities, extended_capabilities);
return (AHCI::HBADefinedCapabilities) {
(capabilities & 0b11111) + 1,
((capabilities >> 8) & 0b11111) + 1,
@ -160,6 +165,10 @@ void AHCIController::initialize()
dmesgln("{}: AHCI controller reset", pci_address());
}
dbgln("{}: AHCI command list entries count - {}", pci_address(), hba_capabilities().max_command_list_entries_count);
u32 version = hba().control_regs.version;
dbgln_if(AHCI_DEBUG, "{}: AHCI Controller Version = 0x{:08x}", pci_address(), version);
hba().control_regs.ghc = 0x80000000; // Ensure that HBA knows we are AHCI aware.
PCI::enable_interrupt_line(pci_address());
PCI::enable_bus_mastering(pci_address());