mirror of
https://github.com/RGBCube/serenity
synced 2025-07-26 06:47:34 +00:00
Kernel: Add CNTFRQ_EL0, Counter-timer Frequency Register
This commit is contained in:
parent
91c3d7199f
commit
d0b73352cc
1 changed files with 18 additions and 0 deletions
|
@ -102,6 +102,24 @@ struct alignas(u64) ID_AA64MMFR0_EL1 {
|
|||
};
|
||||
static_assert(sizeof(ID_AA64MMFR0_EL1) == 8);
|
||||
|
||||
// https://developer.arm.com/documentation/ddi0595/2020-12/AArch64-Registers/CNTFRQ-EL0--Counter-timer-Frequency-register
|
||||
// CNTFRQ_EL0, Counter-timer Frequency register
|
||||
struct alignas(u64) CNTFRQ_EL0 {
|
||||
int : 32;
|
||||
int ClockFrequency : 32;
|
||||
|
||||
static inline CNTFRQ_EL0 read()
|
||||
{
|
||||
CNTFRQ_EL0 frequency;
|
||||
|
||||
asm("mrs %[value], CNTFRQ_EL0"
|
||||
: [value] "=r"(frequency));
|
||||
|
||||
return frequency;
|
||||
}
|
||||
};
|
||||
static_assert(sizeof(CNTFRQ_EL0) == 8);
|
||||
|
||||
// https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/TCR-EL1--Translation-Control-Register--EL1-
|
||||
// Translation Control Register
|
||||
struct alignas(u64) TCR_EL1 {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue