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Kernel/aarch64: Implement storing and restoring floating-point registers
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e57d35ff53
commit
d1eec20773
2 changed files with 55 additions and 2 deletions
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@ -27,6 +27,53 @@ extern "C" void context_first_init(Thread* from_thread, Thread* to_thread) __att
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extern "C" void enter_thread_context(Thread* from_thread, Thread* to_thread) __attribute__((used));
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Processor* g_current_processor;
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READONLY_AFTER_INIT FPUState Processor::s_clean_fpu_state;
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static void store_fpu_state(FPUState* fpu_state)
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{
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asm volatile(
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"mov x0, %[fpu_state]\n"
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"stp q0, q1, [x0, #(0 * 16)]\n"
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"stp q2, q3, [x0, #(2 * 16)]\n"
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"stp q4, q5, [x0, #(4 * 16)]\n"
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"stp q6, q7, [x0, #(6 * 16)]\n"
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"stp q8, q9, [x0, #(8 * 16)]\n"
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"stp q10, q11, [x0, #(10 * 16)]\n"
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"stp q12, q13, [x0, #(12 * 16)]\n"
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"stp q14, q15, [x0, #(14 * 16)]\n"
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"stp q16, q17, [x0, #(16 * 16)]\n"
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"stp q18, q19, [x0, #(18 * 16)]\n"
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"stp q20, q21, [x0, #(20 * 16)]\n"
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"stp q22, q23, [x0, #(22 * 16)]\n"
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"stp q24, q25, [x0, #(24 * 16)]\n"
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"stp q26, q27, [x0, #(26 * 16)]\n"
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"stp q28, q29, [x0, #(28 * 16)]\n"
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"stp q30, q31, [x0, #(30 * 16)]\n"
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"\n" ::[fpu_state] "r"(fpu_state));
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}
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static void load_fpu_state(FPUState* fpu_state)
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{
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asm volatile(
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"mov x0, %[fpu_state]\n"
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"ldp q0, q1, [x0, #(0 * 16)]\n"
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"ldp q2, q3, [x0, #(2 * 16)]\n"
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"ldp q4, q5, [x0, #(4 * 16)]\n"
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"ldp q6, q7, [x0, #(6 * 16)]\n"
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"ldp q8, q9, [x0, #(8 * 16)]\n"
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"ldp q10, q11, [x0, #(10 * 16)]\n"
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"ldp q12, q13, [x0, #(12 * 16)]\n"
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"ldp q14, q15, [x0, #(14 * 16)]\n"
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"ldp q16, q17, [x0, #(16 * 16)]\n"
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"ldp q18, q19, [x0, #(18 * 16)]\n"
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"ldp q20, q21, [x0, #(20 * 16)]\n"
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"ldp q22, q23, [x0, #(22 * 16)]\n"
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"ldp q24, q25, [x0, #(24 * 16)]\n"
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"ldp q26, q27, [x0, #(26 * 16)]\n"
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"ldp q28, q29, [x0, #(28 * 16)]\n"
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"ldp q30, q31, [x0, #(30 * 16)]\n"
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"\n" ::[fpu_state] "r"(fpu_state));
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}
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void Processor::install(u32 cpu)
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{
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@ -46,6 +93,8 @@ void Processor::initialize()
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dmesgln("CPU[{}]: Virtual address bit width: {}", m_cpu, m_virtual_address_bit_width);
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if (!has_feature(CPUFeature::RNG))
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dmesgln("CPU[{}]: {} not detected, randomness will be poor", m_cpu, cpu_feature_to_description(CPUFeature::RNG));
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store_fpu_state(&s_clean_fpu_state);
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}
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[[noreturn]] void Processor::halt()
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@ -397,6 +446,8 @@ extern "C" void enter_thread_context(Thread* from_thread, Thread* to_thread)
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Processor::set_current_thread(*to_thread);
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store_fpu_state(&from_thread->fpu_state());
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auto& from_regs = from_thread->regs();
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auto& to_regs = to_thread->regs();
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if (from_regs.ttbr0_el1 != to_regs.ttbr0_el1)
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@ -407,6 +458,8 @@ extern "C" void enter_thread_context(Thread* from_thread, Thread* to_thread)
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auto in_critical = to_thread->saved_critical();
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VERIFY(in_critical > 0);
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Processor::restore_critical(in_critical);
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load_fpu_state(&to_thread->fpu_state());
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}
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StringView Processor::platform_string()
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@ -213,8 +213,6 @@ public:
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ALWAYS_INLINE static FPUState const& clean_fpu_state()
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{
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static FPUState s_clean_fpu_state {};
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dbgln("FIXME: Processor: Actually return correct FPUState.");
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return s_clean_fpu_state;
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}
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@ -293,6 +291,8 @@ private:
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Thread* m_idle_thread;
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u32 m_in_critical { 0 };
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static FPUState s_clean_fpu_state;
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// FIXME: Once there is code in place to differentiate IRQs from synchronous exceptions (syscalls),
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// this member should be incremented. Also this member shouldn't be a FlatPtr.
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FlatPtr m_in_irq { 0 };
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