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Kernel: Clean up the AHCI code a bit

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The AHCI code is not very good at OOM conditions, so this is a first
step towards OOM correctness. We should not allocate things inside C++
constructors because we can't catch OOM failures, so most allocation
code inside constructors is exported to a different function.

Also, don't use a HashMap for holding RefPtr of AHCIPort objects in
AHCIPortHandler because this structure is not very OOM-friendly. Instead
use a fixed Array of 32 RefPtrs, as at most we can have 32 AHCI ports
per AHCI controller.
This commit is contained in:
Liav A 2022-04-01 20:49:22 +03:00 • committed by Idan Horowitz
parent 6677cd6d70
commit d771ca3278
5 changed files with 81 additions and 62 deletions
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72
Kernel/Storage/ATA/AHCIPortHandler.cpp
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@ -9,9 +9,38 @@
namespace Kernel {
NonnullRefPtr<AHCIPortHandler> AHCIPortHandler::create(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
ErrorOr<NonnullRefPtr<AHCIPortHandler>> AHCIPortHandler::create(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
{
return adopt_ref(*new AHCIPortHandler(controller, irq, taken_ports));
auto port_handler = TRY(adopt_nonnull_ref_or_enomem(new (nothrow) AHCIPortHandler(controller, irq, taken_ports)));
// FIXME: Propagate errors from this method too.
port_handler->allocate_resources_and_initialize_ports();
return port_handler;
}
void AHCIPortHandler::allocate_resources_and_initialize_ports()
{
// FIXME: Use the number of taken ports to determine how many pages we should allocate.
for (size_t index = 0; index < (((size_t)AHCI::Limits::MaxPorts * 512) / PAGE_SIZE); index++) {
m_identify_metadata_pages.append(MM.allocate_supervisor_physical_page().release_value_but_fixme_should_propagate_errors());
}
// Clear pending interrupts, if there are any!
m_pending_ports_interrupts.set_all();
enable_irq();
if (kernel_command_line().ahci_reset_mode() == AHCIResetMode::Aggressive) {
for (auto index : m_taken_ports.to_vector()) {
auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(m_parent_controller->hba().port_regs[index]), index).release_value_but_fixme_should_propagate_errors();
m_handled_ports[index] = port;
port->reset();
}
return;
}
for (auto index : m_taken_ports.to_vector()) {
auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(m_parent_controller->hba().port_regs[index]), index).release_value_but_fixme_should_propagate_errors();
m_handled_ports[index] = port;
port->initialize_without_reset();
}
}
AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8 irq, AHCI::MaskedBitField taken_ports)
@ -20,46 +49,21 @@ AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8 irq, AHCI::Maske
, m_taken_ports(taken_ports)
, m_pending_ports_interrupts(create_pending_ports_interrupts_bitfield())
{
// FIXME: Use the number of taken ports to determine how many pages we should allocate.
for (size_t index = 0; index < (((size_t)AHCI::Limits::MaxPorts * 512) / PAGE_SIZE); index++) {
m_identify_metadata_pages.append(MM.allocate_supervisor_physical_page().release_value_but_fixme_should_propagate_errors());
}
dbgln_if(AHCI_DEBUG, "AHCI Port Handler: IRQ {}", irq);
// Clear pending interrupts, if there are any!
m_pending_ports_interrupts.set_all();
enable_irq();
if (kernel_command_line().ahci_reset_mode() == AHCIResetMode::Aggressive) {
for (auto index : taken_ports.to_vector()) {
auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(controller.hba().port_regs[index]), index);
m_handled_ports.set(index, port);
port->reset();
}
return;
}
for (auto index : taken_ports.to_vector()) {
auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(controller.hba().port_regs[index]), index);
m_handled_ports.set(index, port);
port->initialize_without_reset();
}
}
void AHCIPortHandler::enumerate_ports(Function<void(AHCIPort const&)> callback) const
{
for (auto& port : m_handled_ports) {
callback(*port.value);
for (auto port : m_handled_ports) {
if (port)
callback(*port);
}
}
RefPtr<AHCIPort> AHCIPortHandler::port_at_index(u32 port_index) const
{
VERIFY(m_taken_ports.is_set_at(port_index));
auto it = m_handled_ports.find(port_index);
if (it == m_handled_ports.end())
return nullptr;
return (*it).value;
return m_handled_ports[port_index];
}
PhysicalAddress AHCIPortHandler::get_identify_metadata_physical_region(u32 port_index) const
@ -86,10 +90,10 @@ bool AHCIPortHandler::handle_irq(RegisterState const&)
if (m_pending_ports_interrupts.is_zeroed())
return false;
for (auto port_index : m_pending_ports_interrupts.to_vector()) {
auto port = m_handled_ports.get(port_index);
VERIFY(port.has_value());
auto port = m_handled_ports[port_index];
VERIFY(port);
dbgln_if(AHCI_DEBUG, "AHCI Port Handler: Handling IRQ for port {}", port_index);
port.value()->handle_interrupt();
port->handle_interrupt();
// We do this to clear the pending interrupt after we handled it.
m_pending_ports_interrupts.set_at(port_index);
}