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https://github.com/RGBCube/serenity
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Kernel: Add interrupt support to aarch64 RPi Timer driver
Since we can now build and use the IRQHandler class, we can implement interrupt support for the Timer in the aarch64 build.
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parent
8b77c61e7d
commit
dab6dbe893
2 changed files with 56 additions and 2 deletions
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@ -30,7 +30,8 @@ enum FlagBits {
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};
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Timer::Timer()
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: m_registers(MMIO::the().peripheral<TimerRegisters>(0x3000))
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: IRQHandler(1)
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, m_registers(MMIO::the().peripheral<TimerRegisters>(0x3000))
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{
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}
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@ -51,6 +52,41 @@ u64 Timer::microseconds_since_boot()
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return (static_cast<u64>(high) << 32) | low;
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}
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bool Timer::handle_irq(RegisterState const&)
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{
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dbgln("Timer fired: {} us", m_current_timer_value);
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m_current_timer_value += m_interrupt_interval;
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set_compare(TimerID::Timer1, m_current_timer_value);
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clear_interrupt(TimerID::Timer1);
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return true;
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};
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void Timer::enable_interrupt_mode()
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{
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m_current_timer_value = microseconds_since_boot();
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m_current_timer_value += m_interrupt_interval;
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set_compare(TimerID::Timer1, m_current_timer_value);
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enable_irq();
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}
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void Timer::set_interrupt_interval_usec(u32 interrupt_interval)
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{
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m_interrupt_interval = interrupt_interval;
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}
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void Timer::clear_interrupt(TimerID id)
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{
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m_registers->control_and_status = 1 << to_underlying(id);
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}
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void Timer::set_compare(TimerID id, u32 compare)
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{
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m_registers->compare[to_underlying(id)] = compare;
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}
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class SetClockRateMboxMessage : Mailbox::Message {
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public:
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u32 clock_id;
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@ -7,18 +7,22 @@
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#pragma once
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#include <AK/Types.h>
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#include <Kernel/Interrupts/IRQHandler.h>
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namespace Kernel::RPi {
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struct TimerRegisters;
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class Timer {
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class Timer : public IRQHandler {
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public:
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Timer();
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static Timer& the();
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u64 microseconds_since_boot();
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void set_interrupt_interval_usec(u32);
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void enable_interrupt_mode();
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enum class ClockID {
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Reserved = 0,
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EMMC = 1,
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@ -39,7 +43,21 @@ public:
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static u32 set_clock_rate(ClockID, u32 rate_hz, bool skip_setting_turbo = true);
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private:
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enum class TimerID : u32 {
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Timer0 = 0,
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Timer1 = 1,
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Timer2 = 2,
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Timer3 = 3,
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};
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void set_compare(TimerID, u32 compare);
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void clear_interrupt(TimerID);
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//^ IRQHandler
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virtual bool handle_irq(RegisterState const&) override;
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TimerRegisters volatile* m_registers;
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u32 m_interrupt_interval { 0 };
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u32 m_current_timer_value { 0 };
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};
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}
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