1
Fork 0
mirror of https://github.com/RGBCube/serenity synced 2025-07-27 01:47:35 +00:00

Kernel: Use RDSEED assembly snippet to seed RNG on Aarch64

There’s similar RDRAND register (encoded as ‘s3_3_c2_c4_0ʼ) to be
added if needed. RNG CPU feature on Aarch64 guarantees existence of both
RDSEED and RDRAND registers simultaneously—in contrast to x86-64, where
respective instructions are independent of each other.
This commit is contained in:
konrad 2023-01-08 05:30:40 +01:00 committed by Jelle Raaijmakers
parent 7c8e61f4d1
commit e1c50b83e1
3 changed files with 26 additions and 0 deletions

View file

@ -91,6 +91,19 @@ inline void enter_el1_from_el2()
: "x0");
}
inline u64 read_rndrrs()
{
u64 value = 0;
asm volatile(
"retry:\n"
"mrs %[value], s3_3_c2_c4_1 \n" // encoded RNDRRS register
"b.eq retry\n"
: [value] "=r"(value));
return value;
}
}
namespace Kernel {

View file

@ -44,6 +44,8 @@ void Processor::initialize()
dmesgln("CPU[{}]: Supports {}", m_cpu, build_cpu_feature_names(m_features));
dmesgln("CPU[{}]: Physical address bit width: {}", m_cpu, m_physical_address_bit_width);
dmesgln("CPU[{}]: Virtual address bit width: {}", m_cpu, m_virtual_address_bit_width);
if (!has_feature(CPUFeature::RNG))
dmesgln("CPU[{}]: {} not detected, randomness will be poor", m_cpu, cpu_feature_to_description(CPUFeature::RNG));
}
[[noreturn]] void Processor::halt()