RGBCube/serenity
1
Fork 0
mirror of https://github.com/RGBCube/serenity synced 2025-07-25 20:07:35 +00:00
Code Issues Activity Actions

Kernel/aarch64: Do not trap floating-point instructions

Browse source 
This requires setting the FPEN field of the Architectural Feature Access
Control Register (CPACR_EL1) to 0b11.
This commit is contained in:
Timon Kruiper 2023-01-30 16:06:24 +01:00 • committed by Jelle Raaijmakers
parent dfc6555fec
commit e57d35ff53
2 changed files with 27 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

7
Kernel/Arch/aarch64/Exceptions.cpp
View file

@ -78,6 +78,13 @@ static void setup_el1()
Aarch64::SCTLR_EL1::write(system_control_register_el1);
Aarch64::CPACR_EL1 cpacr_el1 = {};
cpacr_el1.ZEN = 0; // Trap SVE instructions at EL1 and EL0
cpacr_el1.FPEN = 0b11; // Don't trap Advanced SIMD and floating-point instructions
cpacr_el1.SMEN = 0; // Trap SME instructions at EL1 and EL0
cpacr_el1.TTA = 0; // Don't trap access to trace registers
Aarch64::CPACR_EL1::write(cpacr_el1);
Aarch64::Asm::load_el1_vector_table(&vector_table_el1);
}