Kernel: Create support for PCI ECAM

The new PCI subsystem is initialized during runtime.
PCI::Initializer is supposed to be called during early boot, to
perform a few tests, and initialize the proper configuration space
access mechanism. Kernel boot parameters can be specified by a user to
determine what tests will occur, to aid debugging on problematic
machines.
After that, PCI::Initializer should be dismissed.

PCI::IOAccess is a class that is derived from PCI::Access
class and implements PCI configuration space access mechanism via x86
IO ports.
PCI::MMIOAccess is a class that is derived from PCI::Access
and implements PCI configurtaion space access mechanism via memory
access.

The new PCI subsystem also supports determination of IO/MMIO space
needed by a device by checking a given BAR.
In addition, Every device or component that use the PCI subsystem has
changed to match the last changes.

Kernel/PCI/Definitions.h

@@ -0,0 +1,113 @@
+#pragma once
+
+#include <AK/Function.h>
+#include <AK/Types.h>
+
+#define PCI_VENDOR_ID 0x00           // word
+#define PCI_DEVICE_ID 0x02           // word
+#define PCI_COMMAND 0x04             // word
+#define PCI_STATUS 0x06              // word
+#define PCI_REVISION_ID 0x08         // byte
+#define PCI_PROG_IF 0x09             // byte
+#define PCI_SUBCLASS 0x0a            // byte
+#define PCI_CLASS 0x0b               // byte
+#define PCI_CACHE_LINE_SIZE 0x0c     // byte
+#define PCI_LATENCY_TIMER 0x0d       // byte
+#define PCI_HEADER_TYPE 0x0e         // byte
+#define PCI_BIST 0x0f                // byte
+#define PCI_BAR0 0x10                // u32
+#define PCI_BAR1 0x14                // u32
+#define PCI_BAR2 0x18                // u32
+#define PCI_BAR3 0x1C                // u32
+#define PCI_BAR4 0x20                // u32
+#define PCI_BAR5 0x24                // u32
+#define PCI_SUBSYSTEM_ID 0x2C        // u16
+#define PCI_SUBSYSTEM_VENDOR_ID 0x2E // u16
+#define PCI_INTERRUPT_LINE 0x3C      // byte
+#define PCI_SECONDARY_BUS 0x19       // byte
+#define PCI_HEADER_TYPE_DEVICE 0
+#define PCI_HEADER_TYPE_BRIDGE 1
+#define PCI_TYPE_BRIDGE 0x0604
+#define PCI_ADDRESS_PORT 0xCF8
+#define PCI_VALUE_PORT 0xCFC
+#define PCI_NONE 0xFFFF
+#define PCI_MAX_DEVICES_PER_BUS 32
+#define PCI_MAX_BUSES 256
+#define PCI_MAX_FUNCTIONS_PER_DEVICE 8
+
+//#define PCI_DEBUG 1
+
+namespace PCI {
+struct ID {
+    u16 vendor_id { 0 };
+    u16 device_id { 0 };
+
+    bool is_null() const { return !vendor_id && !device_id; }
+
+    bool operator==(const ID& other) const
+    {
+        return vendor_id == other.vendor_id && device_id == other.device_id;
+    }
+};
+
+struct Address {
+    Address() {}
+    Address(u16 seg)
+        : m_seg(seg)
+        , m_bus(0)
+        , m_slot(0)
+        , m_function(0)
+    {
+    }
+    Address(u16 seg, u8 bus, u8 slot, u8 function)
+        : m_seg(seg)
+        , m_bus(bus)
+        , m_slot(slot)
+        , m_function(function)
+    {
+    }
+
+    bool is_null() const { return !m_bus && !m_slot && !m_function; }
+    operator bool() const { return !is_null(); }
+
+    u16 seg() const { return m_seg; }
+    u8 bus() const { return m_bus; }
+    u8 slot() const { return m_slot; }
+    u8 function() const { return m_function; }
+
+    u32 io_address_for_field(u8 field) const
+    {
+        return 0x80000000u | (m_bus << 16u) | (m_slot << 11u) | (m_function << 8u) | (field & 0xfc);
+    }
+
+private:
+    u32 m_seg { 0 };
+    u8 m_bus { 0 };
+    u8 m_slot { 0 };
+    u8 m_function { 0 };
+};
+
+void enumerate_all(Function<void(Address, ID)> callback);
+u8 get_interrupt_line(Address);
+u32 get_BAR0(Address);
+u32 get_BAR1(Address);
+u32 get_BAR2(Address);
+u32 get_BAR3(Address);
+u32 get_BAR4(Address);
+u32 get_BAR5(Address);
+u8 get_revision_id(Address);
+u8 get_subclass(Address);
+u8 get_class(Address);
+u16 get_subsystem_id(Address);
+u16 get_subsystem_vendor_id(Address);
+u32 get_BAR_Space_Size(Address, u8);
+void enable_bus_mastering(Address);
+void disable_bus_mastering(Address);
+
+class Initializer;
+class Access;
+class MMIOAccess;
+class IOAccess;
+class MMIOSegment;
+
+}