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Kernel: Create support for PCI ECAM
The new PCI subsystem is initialized during runtime. PCI::Initializer is supposed to be called during early boot, to perform a few tests, and initialize the proper configuration space access mechanism. Kernel boot parameters can be specified by a user to determine what tests will occur, to aid debugging on problematic machines. After that, PCI::Initializer should be dismissed. PCI::IOAccess is a class that is derived from PCI::Access class and implements PCI configuration space access mechanism via x86 IO ports. PCI::MMIOAccess is a class that is derived from PCI::Access and implements PCI configurtaion space access mechanism via memory access. The new PCI subsystem also supports determination of IO/MMIO space needed by a device by checking a given BAR. In addition, Every device or component that use the PCI subsystem has changed to match the last changes.
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20 changed files with 878 additions and 16 deletions
53
Kernel/PCI/MMIOAccess.h
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53
Kernel/PCI/MMIOAccess.h
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#pragma once
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#include <AK/HashMap.h>
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#include <AK/OwnPtr.h>
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#include <AK/Types.h>
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#include <Kernel/ACPI/Definitions.h>
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#include <Kernel/PCI/Access.h>
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#include <Kernel/VM/PhysicalRegion.h>
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#include <Kernel/VM/Region.h>
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class PCI::MMIOAccess final : public PCI::Access {
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public:
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static void initialize(ACPI_RAW::MCFG&);
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virtual void enumerate_all(Function<void(Address, ID)>&) override final;
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virtual String get_access_type() override final { return "MMIO-Access"; };
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protected:
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MMIOAccess(ACPI_RAW::MCFG&);
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private:
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virtual u8 read8_field(Address address, u32) override final;
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virtual u16 read16_field(Address address, u32) override final;
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virtual u32 read32_field(Address address, u32) override final;
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virtual void write8_field(Address address, u32, u8) override final;
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virtual void write16_field(Address address, u32, u16) override final;
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virtual void write32_field(Address address, u32, u32) override final;
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void map_device(Address address);
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void mmap(VirtualAddress preferred_vaddr, PhysicalAddress paddr, u32);
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void mmap_region(Region& region, PhysicalAddress paddr);
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virtual u32 get_segments_count();
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virtual u8 get_segment_start_bus(u32);
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virtual u8 get_segment_end_bus(u32);
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ACPI_RAW::MCFG& m_mcfg;
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HashMap<u16, MMIOSegment*>& m_segments;
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OwnPtr<Region> m_mmio_segment;
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};
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class PCI::MMIOSegment {
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public:
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MMIOSegment(PhysicalAddress, u8, u8);
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u8 get_start_bus();
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u8 get_end_bus();
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size_t get_size();
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PhysicalAddress get_paddr();
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private:
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PhysicalAddress m_base_addr;
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u8 m_start_bus;
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u8 m_end_bus;
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};
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