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Kernel: Move Prekernel assembly utils to aarch64/ASM_wrapper.h
By moving these functions to the ASM_wrapper.h file, we can get rid of another Prekernel file.
This commit is contained in:
Timon Kruiper
Linus Groh
parent
e80d8d697c
commit
e7c5fd978b
8 changed files with 44 additions and 77 deletions
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@ -1,5 +1,8 @@
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/*
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* Copyright (c) 2021, James Mintram <me@jamesrm.com>
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* Copyright (c) 2021, Nico Weber <thakis@chromium.org>
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* Copyright (c) 2021, Marcin Undak <mcinek@gmail.com>
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* Copyright (c) 2021, Jesse Buhagiar <jooster669@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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@ -51,4 +54,38 @@ inline ExceptionLevel get_current_exception_level()
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return static_cast<ExceptionLevel>(current_exception_level);
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}
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inline void wait_cycles(int n)
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{
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// This is probably too fast when caching and branch prediction is turned on.
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// FIXME: Make timer-based.
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asm("mov x0, %[value]\n"
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"0:\n"
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" subs x0, x0, #1\n"
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" bne 0b" ::[value] "r"(n)
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: "x0");
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}
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inline void el1_vector_table_install(void* vector_table)
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{
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asm("msr VBAR_EL1, %[value]" ::[value] "r"(vector_table));
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}
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inline void enter_el2_from_el3()
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{
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asm volatile(" adr x0, entered_el2\n"
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" msr elr_el3, x0\n"
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" eret\n"
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"entered_el2:" ::
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: "x0");
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}
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inline void enter_el1_from_el2()
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{
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asm volatile(" adr x0, entered_el1\n"
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" msr elr_el2, x0\n"
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" eret\n"
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"entered_el1:" ::
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: "x0");
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}
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}
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@ -1,48 +0,0 @@
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/*
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* Copyright (c) 2021, Nico Weber <thakis@chromium.org>
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* Copyright (c) 2021, Marcin Undak <mcinek@gmail.com>
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* Copyright (c) 2021, Jesse Buhagiar <jooster669@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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.global wait_cycles
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.type wait_cycles, @function
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wait_cycles:
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Lstart:
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// This is probably too fast when caching and branch prediction is turned on.
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// FIXME: Make timer-based.
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subs x0, x0, #1
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bne Lstart
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ret
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.global enter_el2_from_el3
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.type enter_el2_from_el3, @function
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enter_el2_from_el3:
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adr x0, entered_el2
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msr elr_el3, x0
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eret
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entered_el2:
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ret
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.global enter_el1_from_el2
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.type enter_el1_from_el2, @function
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enter_el1_from_el2:
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adr x0, entered_el1
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msr elr_el2, x0
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eret
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entered_el1:
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ret
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//
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// Installs the EL1 vector table
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// Args:
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// x0 - Address of vector table
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//
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// This function doesn't return a value
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//
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.global el1_vector_table_install
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.type el1_vector_table_install, @function
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el1_vector_table_install:
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msr VBAR_EL1, x0
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ret
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@ -1,14 +0,0 @@
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/*
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* Copyright (c) 2021, Marcin Undak <mcinek@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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extern "C" void wait_cycles(int n);
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extern "C" void el1_vector_table_install(void* vector_table);
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// CPU initialization functions
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extern "C" [[noreturn]] void return_from_el2();
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extern "C" [[noreturn]] void return_from_el3();
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@ -5,14 +5,10 @@
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*/
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#include <Kernel/Arch/aarch64/ASM_wrapper.h>
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#include <Kernel/Arch/aarch64/Prekernel/Aarch64_asm_utils.h>
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#include <Kernel/Arch/aarch64/Prekernel/Prekernel.h>
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#include <Kernel/Arch/aarch64/Registers.h>
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#include <Kernel/Panic.h>
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extern "C" void enter_el2_from_el3();
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extern "C" void enter_el1_from_el2();
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using namespace Kernel;
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namespace Prekernel {
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@ -43,8 +39,9 @@ static void drop_to_el2()
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Aarch64::SPSR_EL3::write(saved_program_status_register_el3);
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// This will jump into os_start() below
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enter_el2_from_el3();
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Aarch64::Asm::enter_el2_from_el3();
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}
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static void drop_to_el1()
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{
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Aarch64::HCR_EL2 hypervisor_configuration_register_el2 = {};
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@ -62,7 +59,7 @@ static void drop_to_el1()
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saved_program_status_register_el2.M = Aarch64::SPSR_EL2::Mode::EL1t;
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Aarch64::SPSR_EL2::write(saved_program_status_register_el2);
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enter_el1_from_el2();
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Aarch64::Asm::enter_el1_from_el2();
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}
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static void set_up_el1()
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@ -8,7 +8,6 @@
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#include <Kernel/Arch/Processor.h>
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#include <Kernel/Arch/aarch64/ASM_wrapper.h>
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#include <Kernel/Arch/aarch64/Prekernel/Aarch64_asm_utils.h>
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#include <Kernel/Arch/aarch64/Prekernel/Prekernel.h>
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extern "C" uintptr_t vector_table_el1;
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@ -28,7 +27,7 @@ void Processor::initialize(u32 cpu)
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Prekernel::drop_to_exception_level_1();
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// Load EL1 vector table
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el1_vector_table_install(&vector_table_el1);
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Kernel::Aarch64::Asm::el1_vector_table_install(&vector_table_el1);
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g_current_processor = this;
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}
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@ -4,11 +4,10 @@
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/aarch64/ASM_wrapper.h>
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#include <Kernel/Arch/aarch64/RPi/GPIO.h>
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#include <Kernel/Arch/aarch64/RPi/MMIO.h>
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extern "C" void wait_cycles(int n);
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namespace Prekernel {
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// See BCM2835-ARM-Peripherals.pdf section "6 General Purpose I/O" or bcm2711-peripherals.pdf "Chapter 5. General Purpose I/O".
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@ -73,7 +72,7 @@ void GPIO::internal_enable_pins(u32 enable[2], PullUpDownState state)
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m_registers->pull_up_down_enable = static_cast<u32>(state);
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// 2. Wait 150 cycles – this provides the required set-up time for the control signal
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wait_cycles(150);
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Kernel::Aarch64::Asm::wait_cycles(150);
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// 3. Write to GPPUDCLK0/1 to clock the control signal into the GPIO pads you wish to
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// modify – NOTE only the pads which receive a clock will be modified, all others will
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@ -82,7 +81,7 @@ void GPIO::internal_enable_pins(u32 enable[2], PullUpDownState state)
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m_registers->pull_up_down_enable_clock.bits[1] = enable[1];
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// 4. Wait 150 cycles – this provides the required hold time for the control signal
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wait_cycles(150);
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Kernel::Aarch64::Asm::wait_cycles(150);
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// 5. Write to GPPUD to remove the control signal
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m_registers->pull_up_down_enable = 0;
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@ -23,8 +23,6 @@
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static void draw_logo();
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static u32 query_firmware_version();
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extern "C" void wait_cycles(int n);
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struct TrapFrame {
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u64 x[31]; // Saved general purpose registers
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u64 spsr_el1; // Save Processor Status Register, EL1
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@ -398,7 +398,6 @@ if (NOT "${SERENITY_ARCH}" STREQUAL "aarch64")
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)
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else()
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set(PREKERNEL_SOURCES
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Arch/aarch64/Prekernel/Aarch64_asm_utils.S
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Arch/aarch64/Prekernel/boot.S
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Arch/aarch64/Prekernel/PrekernelExceptions.cpp
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Arch/aarch64/Prekernel/PrekernelMMU.cpp
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