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UE+LibX86: Support bigger reads and writes
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parent
a99812633b
commit
f1957bb86b
11 changed files with 316 additions and 4 deletions
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@ -380,6 +380,10 @@ public:
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void write32(CPU&, const Instruction&, T);
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template<typename CPU, typename T>
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void write64(CPU&, const Instruction&, T);
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template<typename CPU, typename T>
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void write128(CPU&, const Instruction&, T);
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template<typename CPU, typename T>
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void write256(CPU&, const Instruction&, T);
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template<typename CPU>
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typename CPU::ValueWithShadowType8 read8(CPU&, const Instruction&);
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@ -389,6 +393,10 @@ public:
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typename CPU::ValueWithShadowType32 read32(CPU&, const Instruction&);
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template<typename CPU>
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typename CPU::ValueWithShadowType64 read64(CPU&, const Instruction&);
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template<typename CPU>
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typename CPU::ValueWithShadowType128 read128(CPU&, const Instruction&);
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template<typename CPU>
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typename CPU::ValueWithShadowType256 read256(CPU&, const Instruction&);
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template<typename CPU>
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LogicalAddress resolve(const CPU&, const Instruction&);
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@ -680,6 +688,22 @@ ALWAYS_INLINE void MemoryOrRegisterReference::write64(CPU& cpu, const Instructio
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cpu.write_memory64(address, value);
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}
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template<typename CPU, typename T>
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ALWAYS_INLINE void MemoryOrRegisterReference::write128(CPU& cpu, const Instruction& insn, T value)
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{
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VERIFY(!is_register());
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auto address = resolve(cpu, insn);
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cpu.write_memory128(address, value);
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}
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template<typename CPU, typename T>
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ALWAYS_INLINE void MemoryOrRegisterReference::write256(CPU& cpu, const Instruction& insn, T value)
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{
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VERIFY(!is_register());
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auto address = resolve(cpu, insn);
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cpu.write_memory256(address, value);
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}
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template<typename CPU>
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ALWAYS_INLINE typename CPU::ValueWithShadowType8 MemoryOrRegisterReference::read8(CPU& cpu, const Instruction& insn)
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{
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@ -718,6 +742,22 @@ ALWAYS_INLINE typename CPU::ValueWithShadowType64 MemoryOrRegisterReference::rea
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return cpu.read_memory64(address);
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}
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template<typename CPU>
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ALWAYS_INLINE typename CPU::ValueWithShadowType128 MemoryOrRegisterReference::read128(CPU& cpu, const Instruction& insn)
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{
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VERIFY(!is_register());
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auto address = resolve(cpu, insn);
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return cpu.read_memory128(address);
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}
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template<typename CPU>
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ALWAYS_INLINE typename CPU::ValueWithShadowType256 MemoryOrRegisterReference::read256(CPU& cpu, const Instruction& insn)
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{
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VERIFY(!is_register());
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auto address = resolve(cpu, insn);
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return cpu.read_memory256(address);
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}
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template<typename InstructionStreamType>
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ALWAYS_INLINE Instruction Instruction::from_stream(InstructionStreamType& stream, bool o32, bool a32)
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{
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