From fb79b09688c36644894a4cae5a63888791b25e96 Mon Sep 17 00:00:00 2001
From: Hendiadyoin1 <leon.a@serenityos.org>
Date: Sun, 2 Apr 2023 20:22:52 +0200
Subject: [PATCH] Kernel: Turn SD CapabilitiesRegister into a bit-field

---
 Kernel/Storage/SD/Registers.h          | 41 ++++++++++++++++++++++++--
 Kernel/Storage/SD/SDHostController.cpp |  2 +-
 2 files changed, 40 insertions(+), 3 deletions(-)

diff --git a/Kernel/Storage/SD/Registers.h b/Kernel/Storage/SD/Registers.h
index 1809ee9616..bb22e09dfd 100644
--- a/Kernel/Storage/SD/Registers.h
+++ b/Kernel/Storage/SD/Registers.h
@@ -42,8 +42,45 @@ struct HostControlRegisterMap {
     u32 interrupt_status_enable;
     u32 interrupt_signal_enable;
     u32 host_configuration_2;
-    u32 capabilities_0;
-    u32 capabilities_1;
+    // SDHC 2.2.26 Capabilities Register (Cat.C Offset 040h)
+    struct CapabilitesRegister {
+        u32 timeout_clock_frequency : 6;
+        u32 : 1;
+        u32 timeout_clock_unit : 1;
+        u32 base_clock_frequency : 8;
+        u32 max_block_length : 2;
+        u32 eight_bit_support_for_embedded_devices : 1;
+        u32 adma2 : 1;
+        u32 : 1;
+        u32 high_speed : 1;
+        u32 sdma : 1;
+        u32 suspend_resume : 1;
+        u32 three_point_three_volt : 1;
+        u32 three_point_zero_volt : 1;
+        u32 one_point_eight_volt : 1;
+        u32 dma_64_bit_addressing_v4 : 1;
+        u32 dma_64_bit_addressing_v3 : 1;
+        u32 async_interrupt : 1;
+        u32 slot_type : 2;
+        u32 sdr50 : 1;
+        u32 sdr140 : 1;
+        u32 ddr50 : 1;
+        u32 uhs_ii : 1;
+        u32 driver_type_A : 1;
+        u32 driver_type_C : 1;
+        u32 driver_type_D : 1;
+        u32 : 1;
+        u32 timer_count_for_retuning : 4;
+        u32 : 1;
+        u32 use_tuning_for_sdr50 : 1;
+        u32 retuning_modes : 2;
+        u32 clock_multiplier : 8;
+        u32 : 3;
+        u32 adma3 : 1;
+        u32 one_point_eight_vdd2 : 1;
+        u32 : 3;
+    } capabilities;
+
     u32 maximum_current_capabilities;
     u32 maximum_current_capabilities_reserved;
     u32 force_event_for_auto_cmd_error_status;
diff --git a/Kernel/Storage/SD/SDHostController.cpp b/Kernel/Storage/SD/SDHostController.cpp
index b9f3a8f8d6..842856c74a 100644
--- a/Kernel/Storage/SD/SDHostController.cpp
+++ b/Kernel/Storage/SD/SDHostController.cpp
@@ -623,7 +623,7 @@ ErrorOr<SD::SDConfigurationRegister> SDHostController::retrieve_sd_configuration
 ErrorOr<u32> SDHostController::retrieve_sd_clock_frequency()
 {
     const i64 one_mhz = 1'000'000;
-    return { ((m_registers->capabilities_0 & 0xff00) >> 8) * one_mhz };
+    return { m_registers->capabilities.base_clock_frequency * one_mhz };
 }
 
 // PLSS Table 4-43 : Card Status Field/Command