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Kernel: Convert klog() => AK::Format in PCI

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This commit is contained in:
Andreas Kling 2021-03-12 13:57:56 +01:00
parent df65c8f2eb
commit feda905c3f
4 changed files with 12 additions and 19 deletions
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4
Kernel/PCI/Access.cpp
View file

@ -107,9 +107,7 @@ void Access::enumerate_functions(int type, u8 bus, u8 device, u8 function, Funct
callback(address, { early_read16_field(address, PCI_VENDOR_ID), early_read16_field(address, PCI_DEVICE_ID) }); callback(address, { early_read16_field(address, PCI_VENDOR_ID), early_read16_field(address, PCI_DEVICE_ID) });
if (early_read_type(address) == PCI_TYPE_BRIDGE && recursive) { if (early_read_type(address) == PCI_TYPE_BRIDGE && recursive) {
u8 secondary_bus = early_read8_field(address, PCI_SECONDARY_BUS); u8 secondary_bus = early_read8_field(address, PCI_SECONDARY_BUS);
#if PCI_DEBUG dbgln_if(PCI_DEBUG, "PCI: Found secondary bus: {}", secondary_bus);
klog() << "PCI: Found secondary bus: " << secondary_bus;
#endif
VERIFY(secondary_bus != bus); VERIFY(secondary_bus != bus);
enumerate_bus(type, secondary_bus, callback, recursive); enumerate_bus(type, secondary_bus, callback, recursive);
} }

2
Kernel/PCI/IOAccess.cpp
View file

@ -41,7 +41,7 @@ UNMAP_AFTER_INIT void IOAccess::initialize()
UNMAP_AFTER_INIT IOAccess::IOAccess() UNMAP_AFTER_INIT IOAccess::IOAccess()
{ {
klog() << "PCI: Using I/O instructions for PCI configuration space access"; dmesgln("PCI: Using I/O instructions for PCI configuration space access");
enumerate_hardware([&](const Address& address, ID id) { enumerate_hardware([&](const Address& address, ID id) {
m_physical_ids.append({ address, id, get_capabilities(address) }); m_physical_ids.append({ address, id, get_capabilities(address) });
}); });

8
Kernel/PCI/Initializer.cpp
View file

@ -57,22 +57,22 @@ UNMAP_AFTER_INIT void initialize()
else else
IOAccess::initialize(); IOAccess::initialize();
PCI::enumerate([&](const Address& address, ID id) { PCI::enumerate([&](const Address& address, ID id) {
klog() << address << " " << id; dmesgln("{} {}", address, id);
}); });
} }
UNMAP_AFTER_INIT bool test_pci_io() UNMAP_AFTER_INIT bool test_pci_io()
{ {
klog() << "Testing PCI via manual probing... "; dmesgln("Testing PCI via manual probing...");
u32 tmp = 0x80000000; u32 tmp = 0x80000000;
IO::out32(PCI_ADDRESS_PORT, tmp); IO::out32(PCI_ADDRESS_PORT, tmp);
tmp = IO::in32(PCI_ADDRESS_PORT); tmp = IO::in32(PCI_ADDRESS_PORT);
if (tmp == 0x80000000) { if (tmp == 0x80000000) {
klog() << "PCI IO Supported!"; dmesgln("PCI IO supported");
return true; return true;
} }
klog() << "PCI IO Not Supported!"; dmesgln("PCI IO not supported");
return false; return false;
} }

17
Kernel/PCI/MMIOAccess.cpp
View file

@ -83,27 +83,22 @@ UNMAP_AFTER_INIT void MMIOAccess::initialize(PhysicalAddress mcfg)
{ {
if (!Access::is_initialized()) { if (!Access::is_initialized()) {
new MMIOAccess(mcfg); new MMIOAccess(mcfg);
#if PCI_DEBUG dbgln_if(PCI_DEBUG, "PCI: MMIO access initialised.");
dbgln("PCI: MMIO access initialised.");
#endif
} }
} }
UNMAP_AFTER_INIT MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg) UNMAP_AFTER_INIT MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg)
: m_mcfg(p_mcfg) : m_mcfg(p_mcfg)
{ {
klog() << "PCI: Using MMIO for PCI configuration space access"; dmesgln("PCI: Using MMIO for PCI configuration space access");
auto checkup_region = MM.allocate_kernel_region(p_mcfg.page_base(), (PAGE_SIZE * 2), "PCI MCFG Checkup", Region::Access::Read | Region::Access::Write); auto checkup_region = MM.allocate_kernel_region(p_mcfg.page_base(), (PAGE_SIZE * 2), "PCI MCFG Checkup", Region::Access::Read | Region::Access::Write);
#if PCI_DEBUG dbgln_if(PCI_DEBUG, "PCI: Checking MCFG Table length to choose the correct mapping size");
dbgln("PCI: Checking MCFG Table length to choose the correct mapping size");
#endif
auto* sdt = (ACPI::Structures::SDTHeader*)checkup_region->vaddr().offset(p_mcfg.offset_in_page()).as_ptr(); auto* sdt = (ACPI::Structures::SDTHeader*)checkup_region->vaddr().offset(p_mcfg.offset_in_page()).as_ptr();
u32 length = sdt->length; u32 length = sdt->length;
u8 revision = sdt->revision; u8 revision = sdt->revision;
klog() << "PCI: MCFG, length - " << length << ", revision " << revision; dbgln("PCI: MCFG, length: {}, revision: {}", length, revision);
checkup_region->unmap(); checkup_region->unmap();
auto mcfg_region = MM.allocate_kernel_region(p_mcfg.page_base(), page_round_up(length) + PAGE_SIZE, "PCI Parsing MCFG", Region::Access::Read | Region::Access::Write); auto mcfg_region = MM.allocate_kernel_region(p_mcfg.page_base(), page_round_up(length) + PAGE_SIZE, "PCI Parsing MCFG", Region::Access::Read | Region::Access::Write);
@ -117,10 +112,10 @@ UNMAP_AFTER_INIT MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg)
u32 lower_addr = mcfg.descriptors[index].base_addr; u32 lower_addr = mcfg.descriptors[index].base_addr;
m_segments.set(index, { PhysicalAddress(lower_addr), start_bus, end_bus }); m_segments.set(index, { PhysicalAddress(lower_addr), start_bus, end_bus });
klog() << "PCI: New PCI segment @ " << PhysicalAddress(lower_addr) << ", PCI buses (" << start_bus << "-" << end_bus << ")"; dmesgln("PCI: New PCI segment @ {}, PCI buses ({}-{})", PhysicalAddress { lower_addr }, start_bus, end_bus);
} }
mcfg_region->unmap(); mcfg_region->unmap();
klog() << "PCI: MMIO segments - " << m_segments.size(); dmesgln("PCI: MMIO segments: {}", m_segments.size());
InterruptDisabler disabler; InterruptDisabler disabler;