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5 commits

Author SHA1 Message Date
Pankaj Raghav
83b87a5ade Kernel: Add bar_address_mask to mask the last 4 bits of a BAR address
Create a bar_address_mask constant to mask the last 4 bits of a BAR
address instead of hand coding the mask all over the kernel.
2023-04-24 21:41:54 +02:00
Pankaj Raghav
d234e6b801 Kernel: Add polling support to NVMe
Add polling support to NVMe so that it does not use interrupt to
complete a IO but instead actively polls for completion. This probably
is not very efficient in terms of CPU usage but it does not use
interrupts to complete a IO which is beneficial at the moment as there
is no MSI(X) support and it can reduce the latency of an IO in a very
fast NVMe device.

The NVMeQueue class has been made the base class for NVMeInterruptQueue
and NVMePollQueue. The factory function `NVMeQueue::try_create` will
return the appropriate queue to the controller based on the polling
boot parameter.

The polling mode can be enabled by adding an extra boot parameter:
`nvme_poll`.
2022-02-02 18:26:59 +01:00
Pankaj Raghav
567b3a4810 Kernel: Add individual struct definitions for NVMeSubmission
Only a generic struct definition was present for NVMeSubmission. To
improve type safety and clarity, added an union of NVMeSubmission
structs that are applicable to the command being submitted.
2022-01-18 11:37:04 +02:00
Tom
0d65af5e0f Kernel: Wait for NVMe controller to change enabled state
We need to wait up to CAP.TO units of 500ms when changing CC.EN to
enable or disable the controller.
2022-01-15 16:45:56 -08:00
Pankaj Raghav
e99fafb683 Kernel/NVMe: Add initial NVMe driver support
Add a basic NVMe driver support to serenity
based on NVMe spec 1.4.

The driver can support multiple NVMe drives (subsystems).
But in a NVMe drive, the driver can support one controller
with multiple namespaces.

Each core will get a separate NVMe Queue.
As the system lacks MSI support, PIN based interrupts are
used for IO.

Tested the NVMe support by replacing IDE driver
with the NVMe driver :^)
2022-01-01 14:55:58 +01:00