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45 commits

Author SHA1 Message Date
Andreas Kling
775bc158ba UserspaceEmulator: Implement the SHL family of instructions 2020-07-11 23:57:14 +02:00
Andreas Kling
bfacb9583a UserspaceEmulator: Implement RET_imm16
This is just like RET, but it also pops N bytes off the stack.
2020-07-11 23:57:14 +02:00
Andreas Kling
eb86264d3b UserspaceEmulator: Simplify op_foo templates
Instead of templatizing both the destination and source types, simply
templatize the operand type and sign-extend narrower source values at
the call sites instead.
2020-07-11 23:57:14 +02:00
Andreas Kling
6febad1ef3 UserspaceEmulator: The generic_RM*_imm8 functions need to sign extend
We are supposed to sign-extend the 8-bit immediate here,
"cmp eax, 0xff" is actually "cmp eax, 0xffffffff"
2020-07-11 23:57:14 +02:00
Andreas Kling
21837544bb UserspaceEmulator: Implement MOV_EAX_moff32 2020-07-11 23:57:14 +02:00
Andreas Kling
1579cbdc9d UserspaceEmulator: Implement CALL_RM32 2020-07-11 23:57:14 +02:00
Andreas Kling
a6719ede0b UserspaceEmulator: Implement the SHR family of instructions 2020-07-11 23:57:14 +02:00
Andreas Kling
2ee451afed UserspaceEmulator: Implement SHR_RM32_imm8 2020-07-11 23:57:14 +02:00
Andreas Kling
d79f15e219 UserspaceEmulator: Implement the OR family of instructions 2020-07-11 23:57:14 +02:00
Andreas Kling
cb2e36dde7 UserspaceEmulator: Implement PUSH_imm8
Curiously, the 8-bit immediate is sign-extended.
2020-07-11 23:57:14 +02:00
Andreas Kling
ab9c7ef63b UserspaceEmulator: Fix broken MOV_RM32_imm32
Oops, this was incorrectly moving into a GPR rather than the R/M.
2020-07-11 23:57:14 +02:00
Andreas Kling
6c7ae794ce UserspaceEmulator: Implement the 32-bit LEAVE instruction
The 16-bit variant is a bit weird. Let's wait until someone needs it.
2020-07-11 23:57:14 +02:00
Andreas Kling
321ee72fe7 UserspaceEmulator: Implement JMP_imm16 and JMP_imm32 2020-07-11 23:57:14 +02:00
Andreas Kling
12566b9df0 UserspaceEmulator: Implement the MOVZX instruction 2020-07-11 23:57:14 +02:00
Andreas Kling
0af485dfff UserspaceEmulator: Implement STOSB/STOSW/STOSD
...and add a template to handle REP* instruction prefixes. This can be
further generalized, but let's go one step at a time.
2020-07-11 23:57:14 +02:00
Andreas Kling
6688ce41b2 UserspaceEmulator: Implement some of the IMUL instruction family
The single-operand forms of IMUL are a little weird. We can deal with
them when they actually show up.
2020-07-11 23:57:14 +02:00
Andreas Kling
97f4cebc8d UserspaceEmulator+LibX86: Implement the LEA instruction
This piggybacks nicely on Instruction's ModR/M resolution code. :^)
2020-07-11 23:57:14 +02:00
Andreas Kling
b094e5279c UserspaceEmulator: Both ADD and SUB modify the carry flag 2020-07-11 20:10:30 +02:00
Andreas Kling
f23c258290 UserspaceEmulator: Implement the AND and TEST instructions 2020-07-11 20:10:30 +02:00
Andreas Kling
7596ae4596 UserspaceEmulator: Implement the RET instruction
We can now return from a CALL! :^)
2020-07-11 17:22:38 +02:00
Andreas Kling
4d366b8b24 UserspaceEmulator: Implement PUSH_imm32 and PUSH_RM32 2020-07-11 17:12:44 +02:00
Andreas Kling
55d2bd9eec UserspaceEmulator: Implement short-range jump instructions 2020-07-11 17:12:21 +02:00
Andreas Kling
42787ae309 UserspaceEmulator: Implement the CALL_imm32 instruction 2020-07-11 17:05:04 +02:00
Andreas Kling
0a448ee960 UserspaceEmulator: Fix broken inline assembly for asymmetric op_foos
When the Destination and Source of an op_foo were types of different
sizes, the generated assembly was not filling up the "source" register
fully in some cases. This led to incorrect results.
2020-07-11 17:03:42 +02:00
Andreas Kling
ae1d14bc7a UserspaceEmulator: Load the target executable ELF semi-properly :^)
This patch adds a basic ELF program loader to the UserspaceEmulator and
creates MMU regions for each PT_LOAD header. (Note that we don't yet
respect the R/W/X flags etc.)

We also turn the SoftCPU into an X86::InstructionStream and give it an
EIP register so we can actually execute code by fetching memory through
our MMU abstraction.
2020-07-11 16:45:48 +02:00
Andreas Kling
76b9fb258d UserspaceEmulator: Convert the XOR instruction to inline assembly 2020-07-11 16:02:25 +02:00
Andreas Kling
9db588daf1 UserspaceEmulator: Convert the SUB instruction to inline assembly 2020-07-11 15:52:53 +02:00
Andreas Kling
7d41b95071 UserspaceEmulator: Tweak INC and SAR helpers to not be SoftCPU members
It's quite nice having these as compartmentalized free functions.
2020-07-11 15:47:53 +02:00
Andreas Kling
e852768ba6 UserspaceEmulator: Add the INC and ADD instructions
More inline assembly. I'm still figuring out how to combine templates
and inline assembly, but it's turning out pretty cool. :^)
2020-07-11 14:20:08 +02:00
Andreas Kling
133803b8a7 UserspaceEmulator: Split SAR inline assembly into 8/16/32 bit variants 2020-07-11 13:43:27 +02:00
Andreas Kling
743d4ccb8f UserspaceEmulator: Support MOV_RM32_reg32 with memory destination 2020-07-11 13:29:05 +02:00
Andreas Kling
e5afe6a579 UserspaceEmulator: Implement the CMP family of instructions
These are identical to SUB, except they don't store the result (they
only upate the arithmetic flags.)
2020-07-11 13:27:40 +02:00
Andreas Kling
58fd010caf UserspaceEmulator: Implement a bunch of the MOV instructions 2020-07-10 20:29:14 +02:00
Andreas Kling
04d58f54b3 UserspaceEmulator: Implement the SAR instruction
Let's try doing this with some inline assembly. We know we're running
on an x86 target anyway. :^)
2020-07-10 20:20:27 +02:00
Andreas Kling
3899effb19 UserspaceEmulator: Implement the SUB family of instructions 2020-07-10 20:20:27 +02:00
Andreas Kling
0cf7fd5268 UserspaceEmulator+LibX86: Implement all the forms of XOR
And they're all generic, which will make it easy to support more ops.
2020-07-10 20:20:27 +02:00
Andreas Kling
6f27770cea UserspaceEmulator: Add 8/16 bit memory read/write operations 2020-07-10 20:20:27 +02:00
Andreas Kling
f8b38eabeb UserspaceEmulator: First cut of generic instruction implementations
Let's use C++ templates to implement the generic parts of instructions.
There are tons of them with the same set of inputs, just different
behavior. Templates are perfect for this.
2020-07-10 20:20:27 +02:00
Andreas Kling
30ef30ca09 UserspaceEmulator: Add proper segment registers
Some things will flow better if we're able to index into a table of our
segment registers.
2020-07-10 20:20:27 +02:00
Andreas Kling
f1801cfb28 UserspaceEmulator: Fix a Clang warning
Clang didn't like default construction of PartAddressableRegister,
so let's just use memset() then.
2020-07-10 20:20:27 +02:00
Andreas Kling
4d8683b632 UserspaceEmulator: Tidy up SoftCPU's general purpose registers
This patch adds a PartAddressableRegister type, which divides a 32-bit
value into separate parts needed for the EAX/AX/AL/AH register splits.

Clean up the code around register access to make it a little less
cumbersome to use.
2020-07-09 23:27:50 +02:00
Andreas Kling
d10765bec3 UserspaceEmulator: Add an initial stack and implement PUSH/POP reg32
Programs now start out with a 64 KB stack at 0x10000000. :^)
2020-07-09 16:20:08 +02:00
Andreas Kling
8ab601f9e1 UserspaceEmulator: Implement XOR_RM32_reg32
Note that this is a partial implementation since we don't have support
for memory r/m variants yet.
2020-07-07 22:44:58 +02:00
Andreas Kling
934f0b999e UserspaceEmulator: Add arithmetic CPU flags 2020-07-07 22:44:58 +02:00
Andreas Kling
8d8bb07476 UserspaceEmulator: Start building a userspace X86 emulator :^)
This introduces a new X86 CPU emulator for running SerenityOS userspace
programs in a virtualized interpreter environment.

The main goal is to be able to instrument memory accesses and catch
interesting bugs that are very hard to find otherwise. But before we
can do fancy things like that, we have to build a competent emulator
able to actually run programs.

This initial version is able to run a very small program that makes
some tiny syscalls, but nothing more.
2020-07-07 22:44:58 +02:00