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https://github.com/RGBCube/serenity
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There are now 2 separate classes for almost the same object type: - EnumerableDeviceIdentifier, which is used in the enumeration code for all PCI host controller classes. This is allowed to be moved and copied, as it doesn't support ref-counting. - DeviceIdentifier, which inherits from EnumerableDeviceIdentifier. This class uses ref-counting, and is not allowed to be copied. It has a spinlock member in its structure to allow safely executing complicated IO sequences on a PCI device and its space configuration. There's a static method that allows a quick conversion from EnumerableDeviceIdentifier to DeviceIdentifier while creating a NonnullRefPtr out of it. The reason for doing this is for the sake of integrity and reliablity of the system in 2 places: - Ensure that "complicated" tasks that rely on manipulating PCI device registers are done in a safe manner. For example, determining a PCI BAR space size requires multiple read and writes to the same register, and if another CPU tries to do something else with our selected register, then the result will be a catastrophe. - Allow the PCI API to have a united form around a shared object which actually holds much more data than the PCI::Address structure. This is fundamental if we want to do certain types of optimizations, and be able to support more features of the PCI bus in the foreseeable future. This patch already has several implications: - All PCI::Device(s) hold a reference to a DeviceIdentifier structure being given originally from the PCI::Access singleton. This means that all instances of DeviceIdentifier structures are located in one place, and all references are pointing to that location. This ensures that locking the operation spinlock will take effect in all the appropriate places. - We no longer support adding PCI host controllers and then immediately allow for enumerating it with a lambda function. It was found that this method is extremely broken and too much complicated to work reliably with the new paradigm being introduced in this patch. This means that for Volume Management Devices (Intel VMD devices), we simply first enumerate the PCI bus for such devices in the storage code, and if we find a device, we attach it in the PCI::Access method which will scan for devices behind that bridge and will add new DeviceIdentifier(s) objects to its internal Vector. Afterwards, we just continue as usual with scanning for actual storage controllers, so we will find a corresponding NVMe controllers if there were any behind that VMD bridge.
333 lines
14 KiB
C++
333 lines
14 KiB
C++
/*
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* Copyright (c) 2021-2022, Jelle Raaijmakers <jelle@gmta.nl>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/Format.h>
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#include <Kernel/Arch/Delay.h>
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#include <Kernel/Devices/Audio/AC97.h>
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#include <Kernel/Devices/DeviceManagement.h>
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#include <Kernel/InterruptDisabler.h>
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#include <Kernel/Memory/AnonymousVMObject.h>
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namespace Kernel {
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static constexpr int buffer_descriptor_list_max_entries = 32;
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static constexpr u16 pcm_default_sample_rate = 44100;
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static constexpr u16 pcm_fixed_sample_rate = 48000;
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// Valid output range - with double-rate enabled, sample rate can go up to 96kHZ
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static constexpr u16 pcm_sample_rate_minimum = 8000;
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static constexpr u16 pcm_sample_rate_maximum = 48000;
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UNMAP_AFTER_INIT ErrorOr<NonnullLockRefPtr<AC97>> AC97::try_create(PCI::DeviceIdentifier const& pci_device_identifier)
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{
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auto mixer_io_window = TRY(IOWindow::create_for_pci_device_bar(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0));
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auto bus_io_window = TRY(IOWindow::create_for_pci_device_bar(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR1));
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auto pcm_out_channel_io_window = TRY(bus_io_window->create_from_io_window_with_offset(NativeAudioBusChannel::PCMOutChannel));
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auto pcm_out_channel = TRY(AC97Channel::create_with_parent_pci_device(pci_device_identifier.address(), "PCMOut"sv, move(pcm_out_channel_io_window)));
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auto ac97 = adopt_nonnull_lock_ref_or_enomem(new (nothrow) AC97(pci_device_identifier, move(pcm_out_channel), move(mixer_io_window), move(bus_io_window)));
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if (!ac97.is_error())
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TRY(ac97.value()->initialize());
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return ac97;
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}
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UNMAP_AFTER_INIT AC97::AC97(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<AC97Channel> pcm_out_channel, NonnullOwnPtr<IOWindow> mixer_io_window, NonnullOwnPtr<IOWindow> bus_io_window)
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: PCI::Device(const_cast<PCI::DeviceIdentifier&>(pci_device_identifier))
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, IRQHandler(pci_device_identifier.interrupt_line().value())
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, m_mixer_io_window(move(mixer_io_window))
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, m_bus_io_window(move(bus_io_window))
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, m_pcm_out_channel(move(pcm_out_channel))
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{
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}
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UNMAP_AFTER_INIT AC97::~AC97() = default;
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bool AC97::handle_irq(RegisterState const&)
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{
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auto pcm_out_status = m_pcm_out_channel->io_window().read16(AC97Channel::Register::Status);
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dbgln_if(AC97_DEBUG, "AC97 @ {}: interrupt received - status: {:#05b}", device_identifier().address(), pcm_out_status);
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bool is_dma_halted = (pcm_out_status & AudioStatusRegisterFlag::DMAControllerHalted) > 0;
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bool current_equals_last_valid = (pcm_out_status & AudioStatusRegisterFlag::CurrentEqualsLastValid) > 0;
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bool is_completion_interrupt = (pcm_out_status & AudioStatusRegisterFlag::BufferCompletionInterruptStatus) > 0;
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bool is_fifo_error = (pcm_out_status & AudioStatusRegisterFlag::FIFOError) > 0;
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VERIFY(!is_fifo_error);
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// If there is no buffer completion, we're not going to do anything
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if (!is_completion_interrupt)
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return false;
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// On interrupt, we need to reset PCM interrupt flags by setting their bits
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pcm_out_status = AudioStatusRegisterFlag::LastValidBufferCompletionInterrupt
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| AudioStatusRegisterFlag::BufferCompletionInterruptStatus
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| AudioStatusRegisterFlag::FIFOError;
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m_pcm_out_channel->io_window().write16(AC97Channel::Register::Status, pcm_out_status);
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if (is_dma_halted) {
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VERIFY(current_equals_last_valid);
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m_pcm_out_channel->handle_dma_stopped();
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}
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if (!m_irq_queue.is_empty())
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m_irq_queue.wake_all();
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return true;
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}
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UNMAP_AFTER_INIT ErrorOr<void> AC97::initialize()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: mixer base: {:#04x}", device_identifier().address(), m_mixer_io_window);
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dbgln_if(AC97_DEBUG, "AC97 @ {}: bus base: {:#04x}", device_identifier().address(), m_bus_io_window);
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// Read out AC'97 codec revision and vendor
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auto extended_audio_id = m_mixer_io_window->read16(NativeAudioMixerRegister::ExtendedAudioID);
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m_codec_revision = static_cast<AC97Revision>(((extended_audio_id & ExtendedAudioMask::Revision) >> 10) & 0b11);
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dbgln_if(AC97_DEBUG, "AC97 @ {}: codec revision {:#02b}", device_identifier().address(), to_underlying(m_codec_revision));
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if (m_codec_revision == AC97Revision::Reserved)
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return ENOTSUP;
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// Report vendor / device ID
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u32 vendor_id = m_mixer_io_window->read16(NativeAudioMixerRegister::VendorID1) << 16 | m_mixer_io_window->read16(NativeAudioMixerRegister::VendorID2);
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dmesgln_pci(*this, "Vendor ID: {:#8x}", vendor_id);
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// Bus cold reset, enable interrupts
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enable_pin_based_interrupts();
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PCI::enable_bus_mastering(device_identifier());
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auto control = m_bus_io_window->read32(NativeAudioBusRegister::GlobalControl);
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control |= GlobalControlFlag::GPIInterruptEnable;
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control |= GlobalControlFlag::AC97ColdReset;
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m_bus_io_window->write32(NativeAudioBusRegister::GlobalControl, control);
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// Reset mixer
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m_mixer_io_window->write16(NativeAudioMixerRegister::Reset, 1);
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// Enable variable and double rate PCM audio if supported
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auto extended_audio_status = m_mixer_io_window->read16(NativeAudioMixerRegister::ExtendedAudioStatusControl);
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if ((extended_audio_id & ExtendedAudioMask::VariableRatePCMAudio) > 0) {
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extended_audio_status |= ExtendedAudioStatusControlFlag::VariableRateAudio;
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m_variable_rate_pcm_supported = true;
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}
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if (!m_variable_rate_pcm_supported) {
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extended_audio_status &= ~ExtendedAudioStatusControlFlag::DoubleRateAudio;
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} else if ((extended_audio_id & ExtendedAudioMask::DoubleRatePCMAudio) > 0) {
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extended_audio_status |= ExtendedAudioStatusControlFlag::DoubleRateAudio;
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m_double_rate_pcm_enabled = true;
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}
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m_mixer_io_window->write16(NativeAudioMixerRegister::ExtendedAudioStatusControl, extended_audio_status);
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TRY(set_pcm_output_sample_rate(m_variable_rate_pcm_supported ? pcm_default_sample_rate : pcm_fixed_sample_rate));
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// Left and right volume of 0 means attenuation of 0 dB
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set_master_output_volume(0, 0, Muted::No);
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set_pcm_output_volume(0, 0, Muted::No);
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m_pcm_out_channel->reset();
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enable_irq();
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return {};
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}
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void AC97::set_master_output_volume(u8 left_channel, u8 right_channel, Muted mute)
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{
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u16 volume_value = ((right_channel & 63) << 0)
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| ((left_channel & 63) << 8)
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| ((mute == Muted::Yes ? 1 : 0) << 15);
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m_mixer_io_window->write16(NativeAudioMixerRegister::SetMasterOutputVolume, volume_value);
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}
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ErrorOr<void> AC97::set_pcm_output_sample_rate(u32 sample_rate)
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{
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if (m_sample_rate == sample_rate)
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return {};
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auto const double_rate_shift = m_double_rate_pcm_enabled ? 1 : 0;
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auto shifted_sample_rate = sample_rate >> double_rate_shift;
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if (!m_variable_rate_pcm_supported && shifted_sample_rate != pcm_fixed_sample_rate)
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return ENOTSUP;
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if (shifted_sample_rate < pcm_sample_rate_minimum || shifted_sample_rate > pcm_sample_rate_maximum)
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return ENOTSUP;
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m_mixer_io_window->write16(NativeAudioMixerRegister::PCMFrontDACRate, shifted_sample_rate);
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m_sample_rate = static_cast<u32>(m_mixer_io_window->read16(NativeAudioMixerRegister::PCMFrontDACRate)) << double_rate_shift;
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dmesgln_pci(*this, "PCM front DAC rate set to {} Hz", m_sample_rate);
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// Setting the sample rate stops a running DMA engine, so restart it
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if (m_pcm_out_channel->dma_running())
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m_pcm_out_channel->start_dma();
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return {};
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}
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void AC97::set_pcm_output_volume(u8 left_channel, u8 right_channel, Muted mute)
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{
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u16 volume_value = ((right_channel & 31) << 0)
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| ((left_channel & 31) << 8)
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| ((mute == Muted::Yes ? 1 : 0) << 15);
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m_mixer_io_window->write16(NativeAudioMixerRegister::SetPCMOutputVolume, volume_value);
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}
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LockRefPtr<AudioChannel> AC97::audio_channel(u32 index) const
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{
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if (index == 0)
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return m_audio_channel;
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return {};
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}
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void AC97::detect_hardware_audio_channels(Badge<AudioManagement>)
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{
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m_audio_channel = AudioChannel::must_create(*this, 0);
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}
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ErrorOr<void> AC97::set_pcm_output_sample_rate(size_t channel_index, u32 samples_per_second_rate)
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{
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if (channel_index != 0)
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return ENODEV;
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TRY(set_pcm_output_sample_rate(samples_per_second_rate));
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return {};
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}
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ErrorOr<u32> AC97::get_pcm_output_sample_rate(size_t channel_index)
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{
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if (channel_index != 0)
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return Error::from_errno(ENODEV);
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return m_sample_rate;
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}
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ErrorOr<size_t> AC97::write(size_t channel_index, UserOrKernelBuffer const& data, size_t length)
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{
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if (channel_index != 0)
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return Error::from_errno(ENODEV);
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if (!m_output_buffer)
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m_output_buffer = TRY(MM.allocate_dma_buffer_pages(m_output_buffer_page_count * PAGE_SIZE, "AC97 Output buffer"sv, Memory::Region::Access::Write));
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if (!m_buffer_descriptor_list) {
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size_t buffer_descriptor_list_size = buffer_descriptor_list_max_entries * sizeof(BufferDescriptorListEntry);
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buffer_descriptor_list_size = TRY(Memory::page_round_up(buffer_descriptor_list_size));
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m_buffer_descriptor_list = TRY(MM.allocate_dma_buffer_pages(buffer_descriptor_list_size, "AC97 Buffer Descriptor List"sv, Memory::Region::Access::Write));
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}
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Checked<size_t> remaining = length;
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size_t offset = 0;
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while (remaining > static_cast<size_t>(0)) {
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TRY(write_single_buffer(data, offset, min(remaining.value(), PAGE_SIZE)));
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offset += PAGE_SIZE;
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remaining.saturating_sub(PAGE_SIZE);
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}
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return length;
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}
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ErrorOr<void> AC97::write_single_buffer(UserOrKernelBuffer const& data, size_t offset, size_t length)
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{
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VERIFY(length <= PAGE_SIZE);
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{
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// Block until we can write into an unused buffer
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InterruptDisabler disabler;
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do {
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auto pcm_out_status = m_pcm_out_channel->io_window().read16(AC97Channel::Register::Status);
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auto current_index = m_pcm_out_channel->io_window().read8(AC97Channel::Register::CurrentIndexValue);
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int last_valid_index = m_pcm_out_channel->io_window().read8(AC97Channel::Register::LastValidIndex);
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auto head_distance = last_valid_index - current_index;
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if (head_distance < 0)
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head_distance += buffer_descriptor_list_max_entries;
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if (m_pcm_out_channel->dma_running())
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++head_distance;
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// Current index has _passed_ last valid index - move our list index up
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if (head_distance > m_output_buffer_page_count) {
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m_buffer_descriptor_list_index = current_index + 1;
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break;
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}
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// There is room for our data
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if (head_distance < m_output_buffer_page_count)
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break;
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dbgln_if(AC97_DEBUG, "AC97 @ {}: waiting on interrupt - status: {:#05b} CI: {} LVI: {}", device_identifier().address(), pcm_out_status, current_index, last_valid_index);
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m_irq_queue.wait_forever("AC97"sv);
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} while (m_pcm_out_channel->dma_running());
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}
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// Copy data from userspace into one of our buffers
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TRY(data.read(m_output_buffer->vaddr_from_page_index(m_output_buffer_page_index).as_ptr(), offset, length));
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// Write the next entry to the buffer descriptor list
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u16 number_of_samples = length / sizeof(u16);
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auto list_entries = reinterpret_cast<BufferDescriptorListEntry*>(m_buffer_descriptor_list->vaddr().get());
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auto list_entry = &list_entries[m_buffer_descriptor_list_index];
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list_entry->buffer_pointer = static_cast<u32>(m_output_buffer->physical_page(m_output_buffer_page_index)->paddr().get());
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list_entry->control_and_length = number_of_samples | BufferDescriptorListEntryFlags::InterruptOnCompletion;
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auto buffer_address = static_cast<u32>(m_buffer_descriptor_list->physical_page(0)->paddr().get());
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m_pcm_out_channel->set_last_valid_index(buffer_address, m_buffer_descriptor_list_index);
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if (!m_pcm_out_channel->dma_running())
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m_pcm_out_channel->start_dma();
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m_output_buffer_page_index = (m_output_buffer_page_index + 1) % m_output_buffer_page_count;
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m_buffer_descriptor_list_index = (m_buffer_descriptor_list_index + 1) % buffer_descriptor_list_max_entries;
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return {};
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}
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ErrorOr<NonnullOwnPtr<AC97::AC97Channel>> AC97::AC97Channel::create_with_parent_pci_device(PCI::Address pci_device_address, StringView name, NonnullOwnPtr<IOWindow> channel_io_base)
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{
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return adopt_nonnull_own_or_enomem(new (nothrow) AC97::AC97Channel(pci_device_address, name, move(channel_io_base)));
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}
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void AC97::AC97Channel::handle_dma_stopped()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: DMA engine has stopped", m_device_pci_address, name());
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m_dma_running.with([this](auto& dma_running) {
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// NOTE: QEMU might send spurious interrupts while we're not running, so we don't want to panic here.
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if (!dma_running)
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dbgln("AC97 @ {}: received DMA interrupt while it wasn't running", m_device_pci_address);
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dma_running = false;
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});
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}
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void AC97::AC97Channel::reset()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: resetting", m_device_pci_address, name());
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m_channel_io_window->write8(Register::Control, AudioControlRegisterFlag::ResetRegisters);
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while ((m_channel_io_window->read8(Register::Control) & AudioControlRegisterFlag::ResetRegisters) > 0)
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microseconds_delay(50);
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m_dma_running.with([](auto& dma_running) {
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dma_running = false;
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});
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}
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void AC97::AC97Channel::set_last_valid_index(u32 buffer_address, u8 last_valid_index)
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: setting buffer address: {:#x} LVI: {}", m_device_pci_address, name(), buffer_address, last_valid_index);
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m_channel_io_window->write32(Register::BufferDescriptorListBaseAddress, buffer_address);
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m_channel_io_window->write8(Register::LastValidIndex, last_valid_index);
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}
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void AC97::AC97Channel::start_dma()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: starting DMA engine", m_device_pci_address, name());
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auto control = m_channel_io_window->read8(Register::Control);
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control |= AudioControlRegisterFlag::RunPauseBusMaster;
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control |= AudioControlRegisterFlag::FIFOErrorInterruptEnable;
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control |= AudioControlRegisterFlag::InterruptOnCompletionEnable;
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m_channel_io_window->write8(Register::Control, control);
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m_dma_running.with([](auto& dma_running) {
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dma_running = true;
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});
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}
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}
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