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https://github.com/RGBCube/serenity
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0d934fc991
Alot of code is shared between i386/i686/x86 and x86_64 and a lot probably will be used for compatability modes. So we start by moving the headers into one Directory. We will probalby be able to move some cpp files aswell.
108 lines
3.4 KiB
C++
108 lines
3.4 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <Kernel/Arch/x86/CPU.h>
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#include <Kernel/IO.h>
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#include <Kernel/Interrupts/PIC.h>
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#include <Kernel/Scheduler.h>
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#include <Kernel/Thread.h>
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#include <Kernel/Time/PIT.h>
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#include <Kernel/Time/TimeManagement.h>
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#define IRQ_TIMER 0
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namespace Kernel {
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UNMAP_AFTER_INIT NonnullRefPtr<PIT> PIT::initialize(Function<void(const RegisterState&)> callback)
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{
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return adopt(*new PIT(move(callback)));
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}
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inline static void reset_countdown(u16 timer_reload)
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{
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IO::out8(PIT_CTL, TIMER0_SELECT | WRITE_WORD | MODE_COUNTDOWN);
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IO::out8(TIMER0_CTL, LSB(timer_reload));
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IO::out8(TIMER0_CTL, MSB(timer_reload));
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}
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PIT::PIT(Function<void(const RegisterState&)> callback)
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: HardwareTimer(IRQ_TIMER, move(callback))
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, m_periodic(true)
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{
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IO::out8(PIT_CTL, TIMER0_SELECT | WRITE_WORD | MODE_SQUARE_WAVE);
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dmesgln("PIT: {} Hz, square wave ({:#08x})", OPTIMAL_TICKS_PER_SECOND_RATE, BASE_FREQUENCY / OPTIMAL_TICKS_PER_SECOND_RATE);
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reset_to_default_ticks_per_second();
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enable_irq();
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}
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size_t PIT::ticks_per_second() const
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{
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return m_frequency;
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}
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void PIT::set_periodic()
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{
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// FIXME: Implement it...
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VERIFY_NOT_REACHED();
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}
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void PIT::set_non_periodic()
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{
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// FIXME: Implement it...
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VERIFY_NOT_REACHED();
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}
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void PIT::reset_to_default_ticks_per_second()
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{
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InterruptDisabler disabler;
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bool success = try_to_set_frequency(OPTIMAL_TICKS_PER_SECOND_RATE);
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VERIFY(success);
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}
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bool PIT::try_to_set_frequency(size_t frequency)
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{
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InterruptDisabler disabler;
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if (!is_capable_of_frequency(frequency))
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return false;
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disable_irq();
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size_t reload_value = BASE_FREQUENCY / frequency;
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IO::out8(TIMER0_CTL, LSB(reload_value));
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IO::out8(TIMER0_CTL, MSB(reload_value));
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m_frequency = frequency;
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enable_irq();
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return true;
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}
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bool PIT::is_capable_of_frequency(size_t frequency) const
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{
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VERIFY(frequency != 0);
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return frequency <= BASE_FREQUENCY;
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}
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size_t PIT::calculate_nearest_possible_frequency(size_t frequency) const
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{
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VERIFY(frequency != 0);
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return frequency;
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}
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}
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