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The simple PCI::HostBridge class implements access to the PCI configuration space by using x86 IO instructions. Therefore, it should be put in the Arch/x86/PCI directory so it can be easily omitted for non-x86 builds.
136 lines
7.2 KiB
C++
136 lines
7.2 KiB
C++
/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/Format.h>
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#include <Kernel/Bus/PCI/Access.h>
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#include <Kernel/Bus/PCI/Controller/HostController.h>
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#include <Kernel/Bus/PCI/Definitions.h>
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#include <Kernel/Sections.h>
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namespace Kernel::PCI {
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HostController::HostController(PCI::Domain const& domain)
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: m_domain(domain)
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, m_enumerated_buses(Bitmap::try_create(256, false).release_value_but_fixme_should_propagate_errors())
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{
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}
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UNMAP_AFTER_INIT Optional<u8> HostController::get_capabilities_pointer_for_function(BusNumber bus, DeviceNumber device, FunctionNumber function)
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{
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if (read16_field(bus, device, function, PCI::RegisterOffset::STATUS) & (1 << 4)) {
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return read8_field(bus, device, function, PCI::RegisterOffset::CAPABILITIES_POINTER);
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}
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return {};
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}
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UNMAP_AFTER_INIT Vector<Capability> HostController::get_capabilities_for_function(BusNumber bus, DeviceNumber device, FunctionNumber function)
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{
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auto capabilities_pointer = get_capabilities_pointer_for_function(bus, device, function);
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if (!capabilities_pointer.has_value()) {
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return {};
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}
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Vector<Capability> capabilities;
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auto capability_pointer = capabilities_pointer.value();
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while (capability_pointer != 0) {
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u16 capability_header = read16_field(bus, device, function, capability_pointer);
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u8 capability_id = capability_header & 0xff;
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// FIXME: Don't attach a PCI address to a capability object
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capabilities.append({ Address(domain_number(), bus.value(), device.value(), function.value()), capability_id, capability_pointer });
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capability_pointer = capability_header >> 8;
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}
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return capabilities;
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}
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u8 HostController::read8_field(BusNumber bus, DeviceNumber device, FunctionNumber function, PCI::RegisterOffset field)
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{
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return read8_field(bus, device, function, to_underlying(field));
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}
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u16 HostController::read16_field(BusNumber bus, DeviceNumber device, FunctionNumber function, PCI::RegisterOffset field)
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{
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return read16_field(bus, device, function, to_underlying(field));
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}
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UNMAP_AFTER_INIT void HostController::enumerate_functions(Function<IterationDecision(DeviceIdentifier)> const& callback, BusNumber bus, DeviceNumber device, FunctionNumber function, bool recursive_search_into_bridges)
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{
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dbgln_if(PCI_DEBUG, "PCI: Enumerating function, bus={}, device={}, function={}", bus, device, function);
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Address address(domain_number(), bus.value(), device.value(), function.value());
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auto pci_class = (read8_field(bus, device, function, PCI::RegisterOffset::CLASS) << 8u) | read8_field(bus, device, function, PCI::RegisterOffset::SUBCLASS);
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HardwareID id = { read16_field(bus, device, function, PCI::RegisterOffset::VENDOR_ID), read16_field(bus, device, function, PCI::RegisterOffset::DEVICE_ID) };
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ClassCode class_code = read8_field(bus, device, function, PCI::RegisterOffset::CLASS);
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SubclassCode subclass_code = read8_field(bus, device, function, PCI::RegisterOffset::SUBCLASS);
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ProgrammingInterface prog_if = read8_field(bus, device, function, PCI::RegisterOffset::PROG_IF);
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RevisionID revision_id = read8_field(bus, device, function, PCI::RegisterOffset::REVISION_ID);
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SubsystemID subsystem_id = read16_field(bus, device, function, PCI::RegisterOffset::SUBSYSTEM_ID);
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SubsystemVendorID subsystem_vendor_id = read16_field(bus, device, function, PCI::RegisterOffset::SUBSYSTEM_VENDOR_ID);
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InterruptLine interrupt_line = read8_field(bus, device, function, PCI::RegisterOffset::INTERRUPT_LINE);
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InterruptPin interrupt_pin = read8_field(bus, device, function, PCI::RegisterOffset::INTERRUPT_PIN);
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auto capabilities = get_capabilities_for_function(bus, device, function);
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callback(DeviceIdentifier { address, id, revision_id, class_code, subclass_code, prog_if, subsystem_id, subsystem_vendor_id, interrupt_line, interrupt_pin, capabilities });
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if (pci_class == (to_underlying(PCI::ClassID::Bridge) << 8 | to_underlying(PCI::Bridge::SubclassID::PCI_TO_PCI))
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&& recursive_search_into_bridges
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&& (!m_enumerated_buses.get(read8_field(bus, device, function, PCI::RegisterOffset::SECONDARY_BUS)))) {
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u8 secondary_bus = read8_field(bus, device, function, PCI::RegisterOffset::SECONDARY_BUS);
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dbgln_if(PCI_DEBUG, "PCI: Found secondary bus: {}", secondary_bus);
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VERIFY(secondary_bus != bus);
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m_enumerated_buses.set(secondary_bus, true);
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enumerate_bus(callback, secondary_bus, recursive_search_into_bridges);
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}
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}
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UNMAP_AFTER_INIT void HostController::enumerate_device(Function<IterationDecision(DeviceIdentifier)> const& callback, BusNumber bus, DeviceNumber device, bool recursive_search_into_bridges)
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{
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dbgln_if(PCI_DEBUG, "PCI: Enumerating device in bus={}, device={}", bus, device);
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if (read16_field(bus, device, 0, PCI::RegisterOffset::VENDOR_ID) == PCI::none_value)
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return;
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enumerate_functions(callback, bus, device, 0, recursive_search_into_bridges);
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if (!(read8_field(bus, device, 0, PCI::RegisterOffset::HEADER_TYPE) & 0x80))
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return;
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for (u8 function = 1; function < 8; ++function) {
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if (read16_field(bus, device, function, PCI::RegisterOffset::VENDOR_ID) != PCI::none_value)
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enumerate_functions(callback, bus, device, function, recursive_search_into_bridges);
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}
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}
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UNMAP_AFTER_INIT void HostController::enumerate_bus(Function<IterationDecision(DeviceIdentifier)> const& callback, BusNumber bus, bool recursive_search_into_bridges)
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{
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dbgln_if(PCI_DEBUG, "PCI: Enumerating bus {}", bus);
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for (u8 device = 0; device < 32; ++device)
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enumerate_device(callback, bus, device, recursive_search_into_bridges);
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}
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UNMAP_AFTER_INIT void HostController::enumerate_attached_devices(Function<IterationDecision(DeviceIdentifier)> callback)
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{
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VERIFY(Access::the().access_lock().is_locked());
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VERIFY(Access::the().scan_lock().is_locked());
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// First scan bus 0. Find any device on that bus, and if it's a PCI-to-PCI
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// bridge, recursively scan it too.
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m_enumerated_buses.set(m_domain.start_bus(), true);
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enumerate_bus(callback, m_domain.start_bus(), true);
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// Handle Multiple PCI host bridges on bus 0, device 0, functions 1-7 (function 0
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// is the main host bridge).
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// If we happen to miss some PCI buses because they are not reachable through
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// recursive PCI-to-PCI bridges starting from bus 0, we might find them here.
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if ((read8_field(0, 0, 0, PCI::RegisterOffset::HEADER_TYPE) & 0x80) != 0) {
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for (int bus_as_function_number = 1; bus_as_function_number < 8; ++bus_as_function_number) {
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if (read16_field(0, 0, bus_as_function_number, PCI::RegisterOffset::VENDOR_ID) == PCI::none_value)
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continue;
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if (read16_field(0, 0, bus_as_function_number, PCI::RegisterOffset::CLASS) != 0x6)
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continue;
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if (Checked<u8>::addition_would_overflow(m_domain.start_bus(), bus_as_function_number))
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break;
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if (m_enumerated_buses.get(m_domain.start_bus() + bus_as_function_number))
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continue;
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enumerate_bus(callback, m_domain.start_bus() + bus_as_function_number, false);
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m_enumerated_buses.set(m_domain.start_bus() + bus_as_function_number, true);
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}
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}
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}
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}
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