mirror of
https://github.com/RGBCube/serenity
synced 2025-05-21 15:35:07 +00:00
1f9d3a3523
There are now 2 separate classes for almost the same object type: - EnumerableDeviceIdentifier, which is used in the enumeration code for all PCI host controller classes. This is allowed to be moved and copied, as it doesn't support ref-counting. - DeviceIdentifier, which inherits from EnumerableDeviceIdentifier. This class uses ref-counting, and is not allowed to be copied. It has a spinlock member in its structure to allow safely executing complicated IO sequences on a PCI device and its space configuration. There's a static method that allows a quick conversion from EnumerableDeviceIdentifier to DeviceIdentifier while creating a NonnullRefPtr out of it. The reason for doing this is for the sake of integrity and reliablity of the system in 2 places: - Ensure that "complicated" tasks that rely on manipulating PCI device registers are done in a safe manner. For example, determining a PCI BAR space size requires multiple read and writes to the same register, and if another CPU tries to do something else with our selected register, then the result will be a catastrophe. - Allow the PCI API to have a united form around a shared object which actually holds much more data than the PCI::Address structure. This is fundamental if we want to do certain types of optimizations, and be able to support more features of the PCI bus in the foreseeable future. This patch already has several implications: - All PCI::Device(s) hold a reference to a DeviceIdentifier structure being given originally from the PCI::Access singleton. This means that all instances of DeviceIdentifier structures are located in one place, and all references are pointing to that location. This ensures that locking the operation spinlock will take effect in all the appropriate places. - We no longer support adding PCI host controllers and then immediately allow for enumerating it with a lambda function. It was found that this method is extremely broken and too much complicated to work reliably with the new paradigm being introduced in this patch. This means that for Volume Management Devices (Intel VMD devices), we simply first enumerate the PCI bus for such devices in the storage code, and if we find a device, we attach it in the PCI::Access method which will scan for devices behind that bridge and will add new DeviceIdentifier(s) objects to its internal Vector. Afterwards, we just continue as usual with scanning for actual storage controllers, so we will find a corresponding NVMe controllers if there were any behind that VMD bridge.
48 lines
1.9 KiB
C++
48 lines
1.9 KiB
C++
/*
|
|
* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
|
|
*
|
|
* SPDX-License-Identifier: BSD-2-Clause
|
|
*/
|
|
|
|
#pragma once
|
|
|
|
#include <AK/Error.h>
|
|
#include <AK/Try.h>
|
|
#include <Kernel/Bus/PCI/Definitions.h>
|
|
|
|
namespace Kernel::PCI {
|
|
|
|
void write8_locked(DeviceIdentifier const&, PCI::RegisterOffset field, u8 value);
|
|
void write16_locked(DeviceIdentifier const&, PCI::RegisterOffset field, u16 value);
|
|
void write32_locked(DeviceIdentifier const&, PCI::RegisterOffset field, u32 value);
|
|
u8 read8_locked(DeviceIdentifier const&, PCI::RegisterOffset field);
|
|
u16 read16_locked(DeviceIdentifier const&, PCI::RegisterOffset field);
|
|
u32 read32_locked(DeviceIdentifier const&, PCI::RegisterOffset field);
|
|
|
|
HardwareID get_hardware_id(DeviceIdentifier const&);
|
|
bool is_io_space_enabled(DeviceIdentifier const&);
|
|
ErrorOr<void> enumerate(Function<void(DeviceIdentifier const&)> callback);
|
|
void enable_interrupt_line(DeviceIdentifier const&);
|
|
void disable_interrupt_line(DeviceIdentifier const&);
|
|
void raw_access(DeviceIdentifier const&, u32, size_t, u32);
|
|
|
|
u32 get_BAR0(DeviceIdentifier const&);
|
|
u32 get_BAR1(DeviceIdentifier const&);
|
|
u32 get_BAR2(DeviceIdentifier const&);
|
|
u32 get_BAR3(DeviceIdentifier const&);
|
|
u32 get_BAR4(DeviceIdentifier const&);
|
|
u32 get_BAR5(DeviceIdentifier const&);
|
|
u32 get_BAR(DeviceIdentifier const&, HeaderType0BaseRegister);
|
|
size_t get_BAR_space_size(DeviceIdentifier const&, HeaderType0BaseRegister);
|
|
BARSpaceType get_BAR_space_type(u32 pci_bar_value);
|
|
void enable_bus_mastering(DeviceIdentifier const&);
|
|
void disable_bus_mastering(DeviceIdentifier const&);
|
|
void enable_io_space(DeviceIdentifier const&);
|
|
void disable_io_space(DeviceIdentifier const&);
|
|
void enable_memory_space(DeviceIdentifier const&);
|
|
void disable_memory_space(DeviceIdentifier const&);
|
|
|
|
// FIXME: Remove this once we can use PCI::Capability with inline buffer
|
|
// so we don't need this method
|
|
DeviceIdentifier const& get_device_identifier(Address address);
|
|
}
|