mirror of
https://github.com/RGBCube/serenity
synced 2025-10-31 17:42:43 +00:00
5fd975da8f
This code is very x86-specific, because Intel introduced the actual MultiProcessor specification back in 1993, qouted here as a proof: "The MP specification covers PC/AT-compatible MP platform designs based on Intel processor architectures and Advanced Programmable Interrupt Controller (APIC) architectures"
230 lines
9 KiB
C++
230 lines
9 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/ByteReader.h>
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#include <Kernel/API/Syscall.h>
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#include <Kernel/Arch/Interrupts.h>
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#include <Kernel/Arch/x86_64/Firmware/MultiProcessor/Parser.h>
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#include <Kernel/Arch/x86_64/InterruptManagement.h>
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#include <Kernel/Arch/x86_64/Interrupts/APIC.h>
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#include <Kernel/Arch/x86_64/Interrupts/IOAPIC.h>
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#include <Kernel/Arch/x86_64/Interrupts/PIC.h>
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#include <Kernel/Boot/CommandLine.h>
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#include <Kernel/Firmware/ACPI/StaticParsing.h>
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#include <Kernel/Interrupts/InterruptDisabler.h>
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#include <Kernel/Interrupts/SharedIRQHandler.h>
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#include <Kernel/Interrupts/SpuriousInterruptHandler.h>
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#include <Kernel/Memory/TypedMapping.h>
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#include <Kernel/Sections.h>
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#define PCAT_COMPAT_FLAG 0x1
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namespace Kernel {
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static InterruptManagement* s_interrupt_management;
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bool InterruptManagement::initialized()
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{
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return (s_interrupt_management != nullptr);
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}
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InterruptManagement& InterruptManagement::the()
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{
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VERIFY(InterruptManagement::initialized());
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return *s_interrupt_management;
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}
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UNMAP_AFTER_INIT void InterruptManagement::initialize()
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{
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VERIFY(!InterruptManagement::initialized());
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s_interrupt_management = new InterruptManagement();
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if (!kernel_command_line().is_smp_enabled_without_ioapic_enabled()) {
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dbgln("Can't enable SMP mode without IOAPIC mode being enabled");
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}
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if (!kernel_command_line().is_ioapic_enabled() && !kernel_command_line().is_smp_enabled())
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InterruptManagement::the().switch_to_pic_mode();
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else
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InterruptManagement::the().switch_to_ioapic_mode();
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}
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void InterruptManagement::enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)> callback)
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{
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for (size_t i = 0; i < GENERIC_INTERRUPT_HANDLERS_COUNT; i++) {
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auto& handler = get_interrupt_handler(i);
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if (handler.type() == HandlerType::SharedIRQHandler) {
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static_cast<SharedIRQHandler&>(handler).enumerate_handlers(callback);
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continue;
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}
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if (handler.type() != HandlerType::UnhandledInterruptHandler)
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callback(handler);
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}
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}
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IRQController& InterruptManagement::get_interrupt_controller(size_t index)
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{
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return *m_interrupt_controllers[index];
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}
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u8 InterruptManagement::acquire_mapped_interrupt_number(u8 original_irq)
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{
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if (!InterruptManagement::initialized()) {
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// This is necessary, because we install UnhandledInterruptHandlers before we actually initialize the Interrupt Management object...
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return original_irq;
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}
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return InterruptManagement::the().get_mapped_interrupt_vector(original_irq);
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}
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u8 InterruptManagement::acquire_irq_number(u8 mapped_interrupt_vector)
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{
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VERIFY(InterruptManagement::initialized());
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return InterruptManagement::the().get_irq_vector(mapped_interrupt_vector);
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}
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u8 InterruptManagement::get_mapped_interrupt_vector(u8 original_irq)
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{
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// FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
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// FIXME: Find a better way to handle conflict with Syscall interrupt gate.
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VERIFY((original_irq + IRQ_VECTOR_BASE) != syscall_vector);
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return original_irq;
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}
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u8 InterruptManagement::get_irq_vector(u8 mapped_interrupt_vector)
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{
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// FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
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return mapped_interrupt_vector;
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}
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NonnullLockRefPtr<IRQController> InterruptManagement::get_responsible_irq_controller(IRQControllerType controller_type, u8 interrupt_vector)
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{
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for (auto& irq_controller : m_interrupt_controllers) {
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if (irq_controller->gsi_base() <= interrupt_vector && irq_controller->type() == controller_type)
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return irq_controller;
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}
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VERIFY_NOT_REACHED();
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}
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NonnullLockRefPtr<IRQController> InterruptManagement::get_responsible_irq_controller(u8 interrupt_vector)
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{
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if (m_interrupt_controllers.size() == 1 && m_interrupt_controllers[0]->type() == IRQControllerType::i8259) {
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return m_interrupt_controllers[0];
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}
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for (auto& irq_controller : m_interrupt_controllers) {
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if (irq_controller->gsi_base() <= interrupt_vector)
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if (!irq_controller->is_hard_disabled())
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return irq_controller;
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}
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VERIFY_NOT_REACHED();
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}
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UNMAP_AFTER_INIT ErrorOr<Optional<PhysicalAddress>> InterruptManagement::find_madt_physical_address()
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{
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dbgln("Early access to ACPI tables for interrupt setup");
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auto possible_rsdp_physical_address = TRY(ACPI::StaticParsing::find_rsdp_in_platform_specific_memory_locations());
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if (!possible_rsdp_physical_address.has_value())
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return Optional<PhysicalAddress> {};
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auto possible_apic_physical_address = TRY(ACPI::StaticParsing::find_table(possible_rsdp_physical_address.value(), "APIC"sv));
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if (!possible_apic_physical_address.has_value())
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return Optional<PhysicalAddress> {};
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return possible_apic_physical_address.value();
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}
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UNMAP_AFTER_INIT InterruptManagement::InterruptManagement()
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{
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}
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UNMAP_AFTER_INIT void InterruptManagement::switch_to_pic_mode()
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{
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VERIFY(m_interrupt_controllers.is_empty());
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dmesgln("Interrupts: Switch to Legacy PIC mode");
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InterruptDisabler disabler;
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m_interrupt_controllers.append(adopt_lock_ref(*new PIC()));
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SpuriousInterruptHandler::initialize(7);
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SpuriousInterruptHandler::initialize(15);
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dbgln("Interrupts: Detected {}", m_interrupt_controllers[0]->model());
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}
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UNMAP_AFTER_INIT void InterruptManagement::switch_to_ioapic_mode()
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{
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dmesgln("Interrupts: Switch to IOAPIC mode");
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InterruptDisabler disabler;
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m_madt_physical_address = MUST(find_madt_physical_address());
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if (!m_madt_physical_address.has_value()) {
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dbgln("Interrupts: ACPI MADT is not available, reverting to PIC mode");
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switch_to_pic_mode();
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return;
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}
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dbgln("Interrupts: MADT @ P {}", m_madt_physical_address.value().as_ptr());
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locate_apic_data();
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if (m_interrupt_controllers.size() == 1) {
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if (get_interrupt_controller(0).type() == IRQControllerType::i8259) {
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dmesgln("Interrupts: NO IOAPIC detected, Reverting to PIC mode.");
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return;
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}
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}
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for (auto& irq_controller : m_interrupt_controllers) {
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VERIFY(irq_controller);
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if (irq_controller->type() == IRQControllerType::i8259) {
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irq_controller->hard_disable();
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dbgln("Interrupts: Detected {} - Disabled", irq_controller->model());
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SpuriousInterruptHandler::initialize_for_disabled_master_pic();
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SpuriousInterruptHandler::initialize_for_disabled_slave_pic();
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} else {
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dbgln("Interrupts: Detected {}", irq_controller->model());
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}
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}
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if (auto mp_parser = MultiProcessorParser::autodetect()) {
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m_pci_interrupt_overrides = mp_parser->get_pci_interrupt_redirections();
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}
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APIC::initialize();
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APIC::the().init_bsp();
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}
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UNMAP_AFTER_INIT void InterruptManagement::locate_apic_data()
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{
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VERIFY(m_madt_physical_address.has_value());
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auto madt = Memory::map_typed<ACPI::Structures::MADT>(m_madt_physical_address.value()).release_value_but_fixme_should_propagate_errors();
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if (madt->flags & PCAT_COMPAT_FLAG)
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m_interrupt_controllers.append(adopt_lock_ref(*new PIC()));
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size_t entry_index = 0;
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size_t entries_length = madt->h.length - sizeof(ACPI::Structures::MADT);
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auto* madt_entry = madt->entries;
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while (entries_length > 0) {
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size_t entry_length = madt_entry->length;
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if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::IOAPIC) {
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auto* ioapic_entry = (const ACPI::Structures::MADTEntries::IOAPIC*)madt_entry;
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dbgln("IOAPIC found @ MADT entry {}, MMIO Registers @ {}", entry_index, PhysicalAddress(ioapic_entry->ioapic_address));
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m_interrupt_controllers.append(adopt_lock_ref(*new IOAPIC(PhysicalAddress(ioapic_entry->ioapic_address), ioapic_entry->gsi_base)));
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}
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if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::InterruptSourceOverride) {
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auto* interrupt_override_entry = (const ACPI::Structures::MADTEntries::InterruptSourceOverride*)madt_entry;
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u32 global_system_interrupt = 0;
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ByteReader::load<u32>(reinterpret_cast<u8 const*>(&interrupt_override_entry->global_system_interrupt), global_system_interrupt);
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u16 flags = 0;
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ByteReader::load<u16>(reinterpret_cast<u8 const*>(&interrupt_override_entry->flags), flags);
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MUST(m_isa_interrupt_overrides.try_empend(
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interrupt_override_entry->bus,
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interrupt_override_entry->source,
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global_system_interrupt,
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flags));
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dbgln("Interrupts: Overriding INT {:#x} with GSI {}, for bus {:#x}",
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interrupt_override_entry->source,
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global_system_interrupt,
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interrupt_override_entry->bus);
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}
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madt_entry = (ACPI::Structures::MADTEntryHeader*)(VirtualAddress(madt_entry).offset(entry_length).get());
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entries_length -= entry_length;
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entry_index++;
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}
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}
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}
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