mirror of
https://github.com/RGBCube/serenity
synced 2025-05-24 03:15:07 +00:00
e362b56b4f
The kernel and its static data structures are no longer identity-mapped in the bottom 8MB of the address space, but instead move above 3GB. The first 8MB above 3GB are pseudo-identity-mapped to the bottom 8MB of the physical address space. But things don't have to stay this way! Thanks to Jesse who made an earlier attempt at this, it was really easy to get device drivers working once the page tables were in place! :^) Fixes #734.
189 lines
3.8 KiB
ArmAsm
189 lines
3.8 KiB
ArmAsm
.set MULTIBOOT_MAGIC, 0x1badb002
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.set MULTIBOOT_PAGE_ALIGN, 0x1
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.set MULTIBOOT_MEMORY_INFO, 0x2
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.set MULTIBOOT_VIDEO_MODE, 0x4
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.set multiboot_flags, MULTIBOOT_PAGE_ALIGN | MULTIBOOT_MEMORY_INFO | MULTIBOOT_VIDEO_MODE
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.set multiboot_checksum, -(MULTIBOOT_MAGIC + multiboot_flags)
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.section .multiboot
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.align 4
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.long MULTIBOOT_MAGIC
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.long multiboot_flags
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.long multiboot_checksum
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/* for MULTIBOOT_MEMORY_INFO */
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.long 0x00000000 /* header_addr */
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.long 0x00000000 /* load_addr */
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.long 0x00000000 /* load_end_addr */
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.long 0x00000000 /* bss_end_addr */
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.long 0x00000000 /* entry_addr */
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/* for MULTIBOOT_VIDEO_MODE */
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.long 0x00000000 /* mode_type */
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.long 1280 /* width */
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.long 1024 /* height */
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.long 32 /* depth */
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.section .stack, "aw", @nobits
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stack_bottom:
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.skip 32768
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stack_top:
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.section .page_tables, "aw", @nobits
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.align 4096
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.global boot_pdpt
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boot_pdpt:
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.skip 4096
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.global boot_pd0
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boot_pd0:
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.skip 4096
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.global boot_pd3
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boot_pd3:
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.skip 4096
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.global boot_pd3_pde1023_pt
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boot_pd3_pde1023_pt:
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.skip 4096
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.section .text
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.global start
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.type start, @function
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.extern init
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.type init, @function
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.extern multiboot_info_ptr
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.type multiboot_info_ptr, @object
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/*
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construct the following (32-bit PAE) page table layout:
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pdpt
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0: boot_pd0 (0-1GB)
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1: n/a (1-2GB)
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2: n/a (2-3GB)
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3: boot_pd3 (3-4GB)
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boot_pd0 : 512 pde's
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0: (0-2MB) (id 2MB page)
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1: (2-4MB) (id 2MB page)
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2: (4-6MB) (id 2MB page)
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3: (6-8MB) (id 2MB page)
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boot_pd3 : 512 pde's
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0: boot_pd3_pde0 (3072-3074MB) (pseudo)
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1: boot_pd3_pde1 (3074-3076MB) (pseudo)
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2: boot_pd3_pde2 (3076-3078MB) (pseudo)
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3: boot_pd3_pde3 (3078-3080MB) (pseudo)
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4: boot_pd3_pde1023_pt (4094-4096MB) (for page table mappings)
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*/
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start:
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cli
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cld
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/* clear pdpt */
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movl $(boot_pdpt - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* set up pdpt[0] and pdpt[3] */
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movl $(boot_pdpt - 0xc0000000), %edi
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movl $((boot_pd0 - 0xc0000000) + 1), 0(%edi)
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movl $((boot_pd3 - 0xc0000000) + 1), 24(%edi)
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/* clear pd0 */
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movl $(boot_pd0 - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* identity map bottom 8MB using 2MB pages (only PDE, no PTE) */
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movl $4, %ecx
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xorl %eax, %eax
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movl $(boot_pd0 - 0xc0000000), %edi
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1:
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movl %eax, 0(%edi)
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/* PS(2MB) + R/W + Present */
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orl $0x83, 0(%edi)
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addl $8, %edi
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addl $(1048576 * 2), %eax
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loop 1b
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/* clear pd3 */
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* pseudo-identity map first 8MB above 3GB mark using 2MB pages again */
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movl $4, %ecx
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xorl %eax, %eax
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movl $(boot_pd3 - 0xc0000000), %edi
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1:
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movl %eax, 0(%edi)
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/* PS(2MB) + R/W + Present */
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orl $0x83, 0(%edi)
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addl $8, %edi
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addl $(1048576 * 2), %eax
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loop 1b
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/* create an empty page table for the top 2MB at the 4GB mark */
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $(boot_pd3_pde1023_pt - 0xc0000000), 4088(%edi)
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orl $0x3, 4088(%edi)
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movl $0, 4092(%edi)
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/* point CR3 to PDPT */
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movl $(boot_pdpt - 0xc0000000), %eax
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movl %eax, %cr3
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/* enable PAE + PSE */
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movl %cr4, %eax
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orl $0x60, %eax
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movl %eax, %cr4
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/* enable PG */
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movl %cr0, %eax
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orl $0x80000000, %eax
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movl %eax, %cr0
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/* jmp to an address above the 3GB mark */
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push %cs
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push $1f
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retf
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1:
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movl %cr3, %eax
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movl %eax, %cr3
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/* set up initial stack and jump into C++ land */
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mov $stack_top, %esp
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and $-16, %esp
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addl $0xc0000000, %ebx
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movl %ebx, multiboot_info_ptr
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call init
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add $4, %esp
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pushl $exit_message
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call kprintf
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add $4, %esp
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cli
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loop:
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hlt
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jmp loop
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exit_message:
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.asciz "Kernel exited."
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