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https://github.com/RGBCube/serenity
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4744ccbff0
LUN address is essentially how people used to address SCSI devices back in the day we had these devices more in use. However, SCSI was taken as an abstraction layer for many Unix and Unix-like systems, so it still common to see LUN addresses in use. In Serenity, we don't really provide such abstraction layer, and therefore until now, we didn't use LUNs too. However (again), this changes, as we want to let users to address their devices under SysFS easily. LUNs make sense in that regard, because they can be easily adapted to different interfaces besides SCSI. For example, for legacy ATA hard drive being connected to the first IDE controller which was enumerated on the PCI bus, and then to the primary channel as slave device, the LUN address would be 0:0:1. To make this happen, we add unique ID number to each StorageController, which increments by 1 for each new instance of StorageController. Then, we adapt the ATA and NVMe devices to use these numbers and generate LUN in the construction time.
82 lines
2.5 KiB
C++
82 lines
2.5 KiB
C++
/*
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* Copyright (c) 2021, Pankaj R <pankydev8@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/NonnullRefPtr.h>
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#include <AK/NonnullRefPtrVector.h>
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#include <AK/OwnPtr.h>
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#include <AK/RefPtr.h>
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#include <AK/Time.h>
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#include <AK/Tuple.h>
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#include <AK/Types.h>
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#include <Kernel/Bus/PCI/Device.h>
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#include <Kernel/Locking/Spinlock.h>
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#include <Kernel/Memory/TypedMapping.h>
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#include <Kernel/Storage/NVMe/NVMeDefinitions.h>
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#include <Kernel/Storage/NVMe/NVMeNameSpace.h>
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#include <Kernel/Storage/NVMe/NVMeQueue.h>
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#include <Kernel/Storage/StorageController.h>
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namespace Kernel {
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class NVMeController : public PCI::Device
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, public StorageController {
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public:
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static ErrorOr<NonnullRefPtr<NVMeController>> try_initialize(PCI::DeviceIdentifier const&, bool is_queue_polled);
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ErrorOr<void> initialize(bool is_queue_polled);
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explicit NVMeController(PCI::DeviceIdentifier const&);
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RefPtr<StorageDevice> device(u32 index) const override;
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size_t devices_count() const override;
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protected:
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bool reset() override;
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bool shutdown() override;
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void complete_current_request(AsyncDeviceRequest::RequestResult result) override;
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public:
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bool reset_controller();
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bool start_controller();
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u32 get_admin_q_dept();
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u16 submit_admin_command(NVMeSubmission& sub, bool sync = false)
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{
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// First queue is always the admin queue
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if (sync) {
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return m_admin_queue->submit_sync_sqe(sub);
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}
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m_admin_queue->submit_sqe(sub);
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return 0;
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}
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bool is_admin_queue_ready() { return m_admin_queue_ready; };
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void set_admin_queue_ready_flag() { m_admin_queue_ready = true; };
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private:
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ErrorOr<void> identify_and_init_namespaces();
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Tuple<u64, u8> get_ns_features(IdentifyNamespace& identify_data_struct);
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ErrorOr<void> create_admin_queue(Optional<u8> irq);
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ErrorOr<void> create_io_queue(u8 qid, Optional<u8> irq);
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void calculate_doorbell_stride()
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{
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m_dbl_stride = (m_controller_regs->cap >> CAP_DBL_SHIFT) & CAP_DBL_MASK;
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}
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bool wait_for_ready(bool);
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private:
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PCI::DeviceIdentifier m_pci_device_id;
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RefPtr<NVMeQueue> m_admin_queue;
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NonnullRefPtrVector<NVMeQueue> m_queues;
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NonnullRefPtrVector<NVMeNameSpace> m_namespaces;
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Memory::TypedMapping<volatile ControllerRegister> m_controller_regs;
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bool m_admin_queue_ready { false };
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size_t m_device_count { 0 };
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AK::Time m_ready_timeout;
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u32 m_bar { 0 };
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u8 m_dbl_stride { 0 };
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static Atomic<u8> s_controller_id;
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};
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}
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